A survey of coarse-grained reconfigurable architecture and design: Taxonomy, challenges, and applications

L Liu, J Zhu, Z Li, Y Lu, Y Deng, J Han, S Yin… - ACM Computing …, 2019 - dl.acm.org
As general-purpose processors have hit the power wall and chip fabrication cost escalates
alarmingly, coarse-grained reconfigurable architectures (CGRAs) are attracting increasing …

[图书][B] Handbook of signal processing systems

SS Bhattacharyya, EF Deprettere, R Leupers, J Takala - 2013 - Springer
In this new edition of the Handbook of Signal Processing Systems, many of the chapters
from the previous editions have been updated, and several new chapters have been added …

Coarse-grained reconfigurable array architectures

BD Sutter, P Raghavan, A Lambrechts - Handbook of signal processing …, 2019 - Springer
Abstract Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same
inner loops that benefit from the high instruction-level parallelism (ILP) support in very long …

Tram: An open-source template-based reconfigurable architecture modeling framework

Y Qiu, Y Cao, Y Dai, W Yin… - 2022 32nd International …, 2022 - ieeexplore.ieee.org
Coarse-grained reconfigurable architecture (CGRA) is a promising accelerator design
choice due to its high performance and power efficiency in the computation or data-intensive …

Architecture, challenges and applications of dynamic reconfigurable computing

Y Lu, L Liu, J Zhu, S Yin, S Wei - Journal of Semiconductors, 2020 - iopscience.iop.org
As a computing paradigm that combines temporal and spatial computations, dynamic
reconfigurable computing provides superiorities of flexibility, energy efficiency and area …

Elaboration of pyramidal methods applying computation technique “rough-fine” image identification

LI Timchenko, NI Kokriatskaia… - … , Industry, and High …, 2019 - spiedigitallibrary.org
One of the aims of the given research is realization of one of possible variants of the solution
of the problem of efficient integration of high-level information in low-level image …

The principle and progress of dynamically reconfigurable computing technologies

S Wei, Y Lu - Chinese Journal of Electronics, 2020 - Wiley Online Library
With the emergence of new applications and the increasing cost of new semiconductor
manufacturing technology, high energy‐efficiency and flexibility are both critical for …

Modeling of the high-performance PLD-based sectioning method for classification of the shape of optical object images

L Tymchenko, M Petrovskiy, N Kokryatskaya… - SpringerPlus, 2013 - Springer
An analysis of the sectioning method to control a shape of the laser beam spot is conducted
in this paper. A possibility is discussed to use a form factor for solving the problem raised …

Customizable embedded processor array for multimedia applications

M Tükel, A Yurdakul, B Örs - Integration, 2018 - Elsevier
We are proposing a Customizable Embedded Processor Array for Multimedia Applications
(CPAMA). This architecture can be used as a standalone image/video processing chip in …

A templated programmable architecture for highly constrained embedded HD video processing

M Thevenin, M Paindavoine, R Schmit… - Journal of Real-Time …, 2019 - Springer
The implementation of a video reconstruction pipeline is required to improve the quality of
images delivered by highly constrained devices. These algorithms require high computing …