A novel time-to-amplitude converter and a low-cost wide dynamic range FPGA TDC for LiDAR application
This article demonstrates a low-cost wide dynamic range field-programmable gate array
(FPGA) time-to-digital converter (TDC) and a time-to-amplitude converter (TAC) based on an …
(FPGA) time-to-digital converter (TDC) and a time-to-amplitude converter (TAC) based on an …
An all-digital low-power, low-frequency GRO-based time to digital converter for biomedical applications
E Zafarkhah, M Zare, NS Anzabi-Nezhad… - … Integrated Circuits and …, 2024 - Springer
In this paper, an all-digital, 10-bit, low-power Time-to-Digital Converter (TDC) is proposed for
use in biomedical applications. To reduce the area and power consumption, as well as …
use in biomedical applications. To reduce the area and power consumption, as well as …
Pseudo-Differential Time-to-Amplitude Converter for LGAD Based Particle Detectors
S Giroletti, L Ratti, C Vacchi - 2024 IEEE International …, 2024 - ieeexplore.ieee.org
This work is concerned with the design of a pseudo-differential Time-to-Amplitude Converter
(TAC). The TAC has been developed to achieve low-jitter and low-INL performance and …
(TAC). The TAC has been developed to achieve low-jitter and low-INL performance and …
NeuAFG: An Analog Function Generator based on Neural Network for CIM
P Feng, Y Chen, J Yu, Z Jiang, J Su, Q Zhou… - IEEE …, 2025 - ieeexplore.ieee.org
Resistive Random-Access Memory (RRAM)-based Compute-in-Memory (CIM) architectures
offer promising solutions for energy-efficient deep neural network (DNN) inference …
offer promising solutions for energy-efficient deep neural network (DNN) inference …
A high-precision coarse-fine time-to-digital converter with the analog-digital hybrid interpolation
W Deng, W Zhou, X Sun, C Gao, D Guo… - IEICE Electronics …, 2019 - jstage.jst.go.jp
An innovative high-precision coarse-fine time-to-digital converter (TDC) is presented. The
TDC architecture mainly consists of a coarse counter and a delay-line-based analog-digital …
TDC architecture mainly consists of a coarse counter and a delay-line-based analog-digital …
Design and construction of programmable time-to-amplitude converter
A Salvi, K Chavan, P Vaidya - 2020 4th International …, 2020 - ieeexplore.ieee.org
A method of implementation of programmable time-to-amplitude converter is reported in this
paper. It employs a 16-bit multiplying digital-to-analog converter which outputs a precise …
paper. It employs a 16-bit multiplying digital-to-analog converter which outputs a precise …
A Digital Uncertainty-Tolerant Mismatch Compensation Method in a 17-channel Counter-Sampling Based TDC Architecture
J Yang, Y Zhao, J Zhao - 2021 IEEE 3rd International …, 2021 - ieeexplore.ieee.org
A digital calibration method tolerating large uncertainty is proposed in this paper, which
effectively ameliorates the code mismatch issues that occur in counter-sampling based time …
effectively ameliorates the code mismatch issues that occur in counter-sampling based time …