STAMP: Stanford transactional applications for multi-processing
Transactional Memory (TM) is emerging as a promising technology to simplify parallel
programming. While several TM systems have been proposed in the research literature, we …
programming. While several TM systems have been proposed in the research literature, we …
Software transactional memory: Why is it only a research toy?
Software transactional memory: why is it only a research toy? Page 1 40 communications of the
acm | NovEmbER 2008 | vol. 51 | No. 11 practice trAnsActionAL MEMorY (TM)13 is a …
acm | NovEmbER 2008 | vol. 51 | No. 11 practice trAnsActionAL MEMorY (TM)13 is a …
PowerPi: Measuring and modeling the power consumption of the Raspberry Pi
F Kaup, P Gottschling… - 39th Annual IEEE …, 2014 - ieeexplore.ieee.org
An increasing number of households is connected to the Internet via DSL or cable, for which
home gateways are required. The optimization of these-caused by their large number-is a …
home gateways are required. The optimization of these-caused by their large number-is a …
[PDF][PDF] Ad hoc synchronization considered harmful
Many synchronizations in existing multi-threaded programs are implemented in an ad hoc
way. The first part of this paper does a comprehensive characteristic study of ad hoc …
way. The first part of this paper does a comprehensive characteristic study of ad hoc …
Is transactional programming actually easier?
CJ Rossbach, OS Hofmann, E Witchel - Proceedings of the 15th acm …, 2010 - dl.acm.org
Chip multi-processors (CMPs) have become ubiquitous, while tools that ease concurrent
programming have not. The promise of increased performance for all applications through …
programming have not. The promise of increased performance for all applications through …
Pisces: A scalable and efficient persistent transactional memory
Persistent transactional memory (PTM) programming model has recently been exploited to
provide crash-consistent transactional interfaces to ease programming atop NVM. However …
provide crash-consistent transactional interfaces to ease programming atop NVM. However …
[图书][B] Shared-memory synchronization
ML Scott, T Brown - 2013 - Springer
This monograph grows out of nearly 40 years of experience in synchronization and
concurrent data structures. Though written primarily from the perspective of systems …
concurrent data structures. Though written primarily from the perspective of systems …
Why STM can be more than a research toy
Why STM can be more than a research toy Page 1 70 CommuniCations oF the aCm | APRIL
2011 | vOL. 54 | nO. 4 contributed articles whILE muLTIcoRE ARchITEcTuRES are increasingly …
2011 | vOL. 54 | nO. 4 contributed articles whILE muLTIcoRE ARchITEcTuRES are increasingly …
Hardware transactional memory for GPU architectures
WWL Fung, I Singh, A Brownsword… - Proceedings of the 44th …, 2011 - dl.acm.org
Graphics processor units (GPUs) are designed to efficiently exploit thread level parallelism
(TLP), multiplexing execution of 1000s of concurrent threads on a relatively smaller set of …
(TLP), multiplexing execution of 1000s of concurrent threads on a relatively smaller set of …
Unbounded hardware transactional memory for a hybrid DRAM/NVM memory system
Persistent memory programming requires failure atomicity. To achieve this in an efficient
manner, recent proposals use hardware-based logging for atomic-durable updates and …
manner, recent proposals use hardware-based logging for atomic-durable updates and …