Time-to-digital converters (TDCs) are key components of time-mode circuits and enablers for
digital processing of analog signals encoded in time. Since design of time-mode circuits …

An oscillator topology demonstrating an improved phase noise performance is proposed in
this paper. It exploits the time-variant phase noise model with insights into the phase noise …

In this paper, a novel pulse-train time amplifier is proposed that achieves linear, accurate,
and programmable gain for a wide input range. Using the proposed pulse-train time …

A mm-wave digital transmitter based on a 60 GHz all-digital phase-locked loop (ADPLL) with
wideband frequency modulation (FM) for FMCW radar applications is proposed. The …

In this paper, a 2.5 b/stage pipelined time-to-digital converter (TDC) is presented. For
pipelined operation, a novel time-register is proposed which is capable of storing, adding …

A digital fractional-N PLL that employs a high resolution TDC and a truly ΔΣ fractional divider
to achieve low in-band noise with a wide bandwidth is presented. The fractional divider …

This paper presents two class-C CMOS VCOs with a dynamic bias of the core transistors,
which maximizes the oscillation amplitude without compromising the robustness of the …

Digital fractional-N phase-locked loops (PLLs) are an attractive alternative to analog PLLs in
the design of frequency synthesizers for wireless applications. However, the main obstacle …

This paper presents a low-power high-bit-rate phase modulator based on a digital PLL with
single-bit TDC and two-point injection scheme. At high bit rates, this scheme requires a …

A complementary pn class-B oscillator with two magnetically coupled second harmonic tail
resonators is presented and compared to an N-only reference one. An in depth analysis of …