Method to perform secondary-PG aware buffering in IC design flow

J Wu, R Mehra, S Das, B Mathew, K Ho - US Patent 11,449,660, 2022 - Google Patents
A system to generate a design of an integrated circuit, the system comprising a memory and
a processor, the processor to define a plurality of voltage area regions (VARs), based on an …

Power mesh structure for integrated circuit

YS Li, C Chi-Mao, DA Nguyen, PC Lo… - US Patent …, 2023 - Google Patents
A power mesh structure for an integrated circuit is provided. A power switch cell is installed
on the chip of the integrated circuit to control the switching operations of the power domain …