Dynamic load balancing among processors in a parallel computer
JC Hardwick - US Patent 6,292,822, 2001 - Google Patents
It is hard to program parallel computers. Dealing With many processors at the same time,
either explicitly or implicitly, makes parallel programs harder to design, analyZe, build, and …
either explicitly or implicitly, makes parallel programs harder to design, analyZe, build, and …
Apparatus, program product and method of debugging utilizing a context sensitive breakpoint
CL Bates, PR Day - US Patent 6,077,312, 2000 - Google Patents
the invention is generally related to computers and computer software. More specifically, the
invention is generally related to the use of breakpoints in debugging computer software …
invention is generally related to the use of breakpoints in debugging computer software …
Parallel processing method and system using a lazy parallel data type to reduce inter-processor communication
JC Hardwick - US Patent 6,212,617, 2001 - Google Patents
(57) ABSTRACT A parallel programming system provides a laZy collection oriented data
type that reduces inter-processor communica tion in programs executed on parallel …
type that reduces inter-processor communica tion in programs executed on parallel …
Method for executing a sequential program in parallel with automatic fault tolerance
A Jalan, R Chadha - US Patent 7,159,211, 2007 - Google Patents
(54) METHOD FOR EXECUTING ASEQUENTIAL 5,452.461 A 9, 1995 Umekita et al.
PROGRAM IN PARALLEL WITH 5,832,272 A 1 1/1998 Kalantery AUTOMATIC FAULT …
PROGRAM IN PARALLEL WITH 5,832,272 A 1 1/1998 Kalantery AUTOMATIC FAULT …
Software implemented method for automatically validating the correctness of parallel computer programs
DK Poulsen, PM Petersen, SM Shah - US Patent 6,286,130, 2001 - Google Patents
A software-implemented method for validating the correctness of parallel computer
programs, written in various programming languages, with respect to these programs' …
programs, written in various programming languages, with respect to these programs' …
Variance analysis for translating CUDA code for execution by a general purpose processor
V Grover, BJM Aarts, M Murphy - US Patent 8,984,498, 2015 - Google Patents
One embodiment of the present invention sets forth a tech nique for translating application
programs written using a parallel programming model for execution on multi-core graphics …
programs written using a parallel programming model for execution on multi-core graphics …
Method and system for testing behavior of procedures
AS Kossatchev, AV Barancev, IB Burdonov… - US Patent …, 2004 - Google Patents
(57) ABSTRACT A Systematic testing method of procedures is disclosed. The testing is
carried out for parallel procedures Separately from consecutive procedures which have no …
carried out for parallel procedures Separately from consecutive procedures which have no …
Parallelizing applications of script-driven tools
M Serrano - US Patent 7,047,232, 2006 - Google Patents
US PATENT DOCUMENTS 5,088,034 A 2, 1992 Ihara et al.................. 717/16O 5,151,991 A*
9, 1992 Iwasawa et al............. 717 150 5,313,584 A 5/1994 Tickner et al................. 71 O? 37 …
9, 1992 Iwasawa et al............. 717 150 5,313,584 A 5/1994 Tickner et al................. 71 O? 37 …
Interactive software testing system and method
Software code that includes instructions relating to assign ment of variables, and decision
branches. The method com prises the Steps of generating a plurality of nodes, edges and …
branches. The method com prises the Steps of generating a plurality of nodes, edges and …
Method and system for forming skeletons for generating verification systems
AS Kossatchev, AV Barancev, IB Burdonov… - US Patent …, 2005 - Google Patents
(57) ABSTRACT A verification System for a procedure interface is generated by using formal
specifications of the procedure interface and generating test Suites. The test Suites are …
specifications of the procedure interface and generating test Suites. The test Suites are …