Hardware design of FFT polynomial multipliers
CP Rentería-Mejía, A López-Parrado… - 2014 IEEE 5th Latin …, 2014 - ieeexplore.ieee.org
This paper presents the design of two FFT polynomial multipliers using parallel and
sequential architectures. Parallel and sequential polynomial multipliers were optimized for …
sequential architectures. Parallel and sequential polynomial multipliers were optimized for …
Hardware implementation of FFT-based spectrum sensing techniques for cognitive radio
JFM Lee, A López-Parrado… - 2016 IEEE 7th Latin …, 2016 - ieeexplore.ieee.org
This paper presents the hardware implementation of FFT-based spectral correlation and
pilot sensing spectrum sensing techniques defined in IEEE 802.22 standard. Both …
pilot sensing spectrum sensing techniques defined in IEEE 802.22 standard. Both …