Low dielectric constant materials
Modern computer microprocessor chips are marvels of engineering complexity. For the
current 45 nm technology node, there may be nearly a billion transistors on a chip barely 1 …
current 45 nm technology node, there may be nearly a billion transistors on a chip barely 1 …
[HTML][HTML] Progress in the development and understanding of advanced low k and ultralow k dielectrics for very large-scale integrated interconnects—State of the art
The improved performance of the semiconductor microprocessors was achieved for several
decades by continuous scaling of the device dimensions while using the same materials for …
decades by continuous scaling of the device dimensions while using the same materials for …
Research progress on porous low dielectric constant materials
M Xie, M Li, Q Sun, W Fan, S Xia, W Fu - Materials Science in …, 2022 - Elsevier
With the rapid development of ultra-large-scale integration (ULSI) of integrated circuits, the
feature size of the silicon chip continues shrinking and the physical gate length is …
feature size of the silicon chip continues shrinking and the physical gate length is …
Impact of VUV photons on SiO2 and organosilicate low-k dielectrics: General behavior, practical applications, and atomic models
MR Baklanov, V Jousseaume, TV Rakhimova… - Applied Physics …, 2019 - pubs.aip.org
This paper presents an in-depth overview of the application and impact of UV/VUV light in
advanced interconnect technology. UV light application in BEOL historically was mainly …
advanced interconnect technology. UV light application in BEOL historically was mainly …
PECVD low and ultralow dielectric constant materials: From invention and research to products
A Grill - Journal of Vacuum Science & Technology B, 2016 - pubs.aip.org
This paper is based on the 2015 AVS John A. Thornton Memorial Award Lecture. In 2015,
the semiconductor industry celebrated the 50th anniversary of Moore's law, which has been …
the semiconductor industry celebrated the 50th anniversary of Moore's law, which has been …
Plasma atomic layer etching of molybdenum with surface fluorination
Y Kim, H Kang, H Ha, C Kim, S Cho, H Chae - Applied Surface Science, 2023 - Elsevier
This work developed a plasma atomic layer etching (ALE) process for molybdenum (Mo)
with surface fluorination and ion bombardment. The Mo surface was fluorinated with CHF 3 …
with surface fluorination and ion bombardment. The Mo surface was fluorinated with CHF 3 …
Effect of wiring density and pillar structure on chip packaging interaction for mixed-signal Cu low k chips
Multilevel finite element analysis (FEA) was used to study the effects of wiring density and
solder pillar structure on chip-package interaction (CPI) for advanced Cu/low k mixed-signal …
solder pillar structure on chip-package interaction (CPI) for advanced Cu/low k mixed-signal …
Nuclear reaction analysis for H, Li, Be, B, C, N, O and F with an RBS check
Abstract 15 N nuclear reaction analysis (NRA) for H is combined with 1.2 MeV deuteron (D)
NRA which provides a simultaneous analysis for Li, Be, B, C, N, O and F. The energy …
NRA which provides a simultaneous analysis for Li, Be, B, C, N, O and F. The energy …
Surface energy characterization for die-level Cu hybrid bonding
K Sakuma, R Yu, M Belyansky… - 2022 IEEE 72nd …, 2022 - ieeexplore.ieee.org
The characteristics and quality of the bonding interface in hybrid bonding vary greatly
depending on physical and chemical factors during the bonding process. Quantitative …
depending on physical and chemical factors during the bonding process. Quantitative …
Porous dielectrics in microelectronic wiring applications
V McGahay - Materials, 2010 - mdpi.com
Porous insulators are utilized in the wiring structure of microelectronic devices as a means of
reducing, through low dielectric permittivity, power consumption and signal delay in …
reducing, through low dielectric permittivity, power consumption and signal delay in …