Performance analysis of 4: 1 multiplexer with DTMOS technique
This paper presents dynamic threshold MOS (DTMOS) technique used with the digital circuit
that is 4× 1 multiplexer with enhanced performance of the multiplexer in comparison to the …
that is 4× 1 multiplexer with enhanced performance of the multiplexer in comparison to the …
Toward secured FPGA: Silicon proven CLB with reduced information leakage
D Zooker, OO Shalom, Y Weizman… - IEEE Solid-State …, 2020 - ieeexplore.ieee.org
The ubiquity of FPGAs in security applications makes it imperative to design a secured
configurable logic block (sCLB) that is resilient to side channel attacks. In this letter, we take …
configurable logic block (sCLB) that is resilient to side channel attacks. In this letter, we take …
The Unified Side-Channel Attack Testing Methodology (USCA-TM) with Hardware Microbenchmark Validation
A Johnson - 2023 - search.proquest.com
A side-channel in computing terms is a by-product of the implementation and functioning of
a computer systems' component part. Whether it be electromagnetic (EM) emissions, heat …
a computer systems' component part. Whether it be electromagnetic (EM) emissions, heat …
[PDF][PDF] Reliability of cryptographic information on fiscal data
DV Volkov, AN Maloletko - European Research Studies, 2018 - ersj.eu
Reliability of Cryptographic Information on Fiscal Data Page 1 European Research Studies
Journal Volume XXI, Issue 4, 2018 pp. 744-753 Reliability of Cryptographic Information on …
Journal Volume XXI, Issue 4, 2018 pp. 744-753 Reliability of Cryptographic Information on …