[图书][B] Cellular neural networks, multi-scroll chaos and synchronization

JAK Suykens, J Vandewalle - 2005 - books.google.com
For engineering applications that are based on nonlinear phenomena, novel information
processing systems require new methodologies and design principles. This perspective is …

ACE16k: A Programmable Focal Plane Vision Processor with 128 x 128 Resolution

G Liñán-Cembrano, R Domínguez-Castro… - 2001 - digital.csic.es
This paper presents a new generation 128x128 Focal Plane Analog Programmable Array
Processor (FPAPAP), from a system level perspective. The design has recently sent to …

A 1000 FPS at 128/spl times/128 vision processor with 8-bit digitized I/O

GL Cembrano, A Rodríguez-Vázquez… - IEEE Journal of Solid …, 2004 - ieeexplore.ieee.org
This paper presents a mixed-signal programmable chip for high-speed vision applications. It
consists of an array of processing elements, arranged to operate in accordance with the …

ACE16k: a 128× 128 focal plane analog processor with digital I/O

GL Cembrano, Á Rodríguez-Vázquez… - … journal of neural …, 2003 - World Scientific
This paper presents a new generation 128× 128 Focal-Plane Analog Programmable Array
Processor-FPAPAP, from a system level perspective. It has been manufactured in a 0.35 μm …

ACE16K: An advanced focal-plane analog programmable array processor

G Linan, R Dominguez-Castro, S Espejo… - Proceedings of the …, 2001 - ieeexplore.ieee.org
This paper presents a new generation 128× 128 Focal-Plane Analog Programmable Array
Processor (FP-APAP), from a system level perspective. It has been manufactured in a 0.35 …

ACE16K: a 128/spl times/128 focal plane analog processor with digital I/O

G Linan, A Rodriguez-Vazquez… - Proceedings of the …, 2002 - ieeexplore.ieee.org
This paper presents a new generation 128/spl times/128 focal-plane analog programmable
array processor (FPAPAP), from a system level perspective, which has been manufactured …

Architectural and basic circuit considerations for a flexible 128× 128 mixed-signal SIMD vision chip

G Linan, S Espejo, R Dominguez-Castro… - … Integrated Circuits and …, 2002 - Springer
From a system level perspective, this paper presents a 128× 128 flexible and reconfigurable
F ocal-P lane A nalog P rogrammable A rray P rocessor, which has been designed as a …

An 0.5-/spl mu/m cmos analog random access memory chip for teraops speed multimedia video processing

R Carmona-Galán… - IEEE Transactions …, 1999 - ieeexplore.ieee.org
Data compressing, data coding, and communications in object-oriented multimedia
applications like telepresence, computer-aided medical diagnosis, or telesurgery require an …

Mismatch-induced trade-offs and scalability of analog preprocessing visual microprocessor chips

A Rodríguez-Vázquez, G Linan, S Espejo… - … Integrated Circuits and …, 2003 - Springer
This paper explores trade-offs associated with the scaling of the interaction circuits (synaptic
transconductance multipliers) in visual microprocessor chips. These trade-offs are related to …

Versatile sensor interface for programmable vision systems-on-chip

A Rodriguez-Vazquez, G Linan, E Roca… - … Camera Systems for …, 2003 - spiedigitallibrary.org
This paper describes an optical sensor interface designed for a programmable mixed-signal
vision chip. This chip has been designed and manufactured in a standard 0.35 μm n-well …