This paper presents a new generation 128x128 Focal Plane Analog Programmable Array Processor (FPAPAP), from a system level perspective. The design has recently sent to …
This paper presents a mixed-signal programmable chip for high-speed vision applications. It consists of an array of processing elements, arranged to operate in accordance with the …
This paper presents a new generation 128× 128 Focal-Plane Analog Programmable Array Processor-FPAPAP, from a system level perspective. It has been manufactured in a 0.35 μm …
This paper presents a new generation 128× 128 Focal-Plane Analog Programmable Array Processor (FP-APAP), from a system level perspective. It has been manufactured in a 0.35 …
This paper presents a new generation 128/spl times/128 focal-plane analog programmable array processor (FPAPAP), from a system level perspective, which has been manufactured …
From a system level perspective, this paper presents a 128× 128 flexible and reconfigurable F ocal-P lane A nalog P rogrammable A rray P rocessor, which has been designed as a …
R Carmona-Galán… - IEEE Transactions …, 1999 - ieeexplore.ieee.org
Data compressing, data coding, and communications in object-oriented multimedia applications like telepresence, computer-aided medical diagnosis, or telesurgery require an …
This paper explores trade-offs associated with the scaling of the interaction circuits (synaptic transconductance multipliers) in visual microprocessor chips. These trade-offs are related to …
This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been designed and manufactured in a standard 0.35 μm n-well …