A multi-functional in-memory inference processor using a standard 6T SRAM array

M Kang, SK Gonugondla, A Patil… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
A multi-functional in-memory inference processor integrated circuit (IC) in a 65-nm CMOS
process is presented. The prototype employs a deep in-memory architecture (DIMA), which …

The Internet of Things on its edge: Trends toward its tipping point

M Alioto, M Shahghasemi - IEEE Consumer Electronics …, 2017 - ieeexplore.ieee.org
In this article, a review of commercial devices on the edge of the Internet of Things (IoT), or
IoT nodes, is presented in terms of hardware requirements. IoT nodes are the interface …

Always-on 674μ W@ 4GOP/s error resilient binary neural networks with aggressive SRAM voltage scaling on a 22-nm IoT end-node

A Di Mauro, F Conti, PD Schiavone… - … on Circuits and …, 2020 - ieeexplore.ieee.org
Binary Neural Networks (BNNs) have been shown to be robust to random bit-level noise,
making aggressive voltage scaling attractive as a power-saving technique for both logic and …

Energy-quality scalable integrated circuits and systems: Continuing energy scaling in the twilight of Moore's law

M Alioto, V De, A Marongiu - IEEE Journal on Emerging and …, 2018 - ieeexplore.ieee.org
This paper aims to take stock of recent advances in the field of energy-quality (EQ) scalable
circuits and systems, as promising direction to continue the historical exponential energy …

An 800-MHz Mixed- 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications

R Giterman, A Fish, N Geuli… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
Gain-cell embedded DRAM (GC-eDRAM) is an attractive alternative to traditional static
random access memory (SRAM) due to its high-density, low-leakage, and inherent two …

Energy-quality scalable adaptive VLSI circuits and systems beyond approximate computing

M Alioto - Design, Automation & Test in Europe Conference & …, 2017 - ieeexplore.ieee.org
In this paper, the concept of energy-quality (EQ) scalable systems is introduced and
explored, as novel design dimension to scale down energy in integrated systems for the …

Fully synthesizable low-area digital-to-analog converter with graceful degradation and dynamic power-resolution scaling

O Aiello, PS Crovetti, M Alioto - IEEE Transactions on Circuits …, 2019 - ieeexplore.ieee.org
In this paper, a fully synthesizable digital-to-analog converter (DAC) is proposed. Based on
a digital standard cell approach, the proposed DAC allows very low design effort and …

Energy-quality scalable adders based on nonzeroing bit truncation

F Frustaci, S Perri, P Corsonello… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
Approximate addition is a technique to trade off energy consumption and output quality in
error-tolerant applications. In prior art, bit truncation has been explored as a lever to …

Approximate computing survey, Part II: Application-specific & architectural approximation techniques and applications

V Leon, MA Hanif, G Armeniakos, X Jiao… - arXiv preprint arXiv …, 2023 - arxiv.org
The challenging deployment of compute-intensive applications from domains such Artificial
Intelligence (AI) and Digital Signal Processing (DSP), forces the community of computing …

Progressive scaled STT-RAM for approximate computing in multimedia applications

B Zeinali, D Karsinos, F Moradi - IEEE Transactions on Circuits …, 2017 - ieeexplore.ieee.org
Spintronic memories are one of the most promising candidates as a universal memory.
Although they offer superior energy efficiency over the conventional memories, benefiting …