11.1 a 1.7 pJ/b 112Gb/s XSR transceiver for intra-package communication in 7nm FinFET technology

R Yousry, E Chen, YM Ying, M Abdullatif… - … Solid-State Circuits …, 2021 - ieeexplore.ieee.org
COVID-19 sparked a paradigm shift for businesses, education, and social life. The measures
taken have emphasized, more than ever, the importance of on-line communication …

Analysis and Design of an Optimal Noise Estimation and Cancellation Filter in Wireline Communication

ME Meybodi, H Shakiba… - IEEE Open Journal of …, 2024 - ieeexplore.ieee.org
This paper presents a comprehensive study of noise prediction and cancellation techniques
in high-speed wireline communication systems. Feedforward and feedback architectures are …

Design of PAM-4 Receiver with Baud-Rate Phase Detector

노승하 - 2023 - s-space.snu.ac.kr
In this thesis, design techniques of phase detection in clock and data recov-ery (CDR) are
proposed. For the robust operation, a transition-weighted tech-nique assigning a different …

A 2-Bit 4-Level 4-Wire 56Gb/s Transceiver in 14nm FinFET

K Sheng, L Shi, W Gai, Q Hua… - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
In this paper, a 2-bit 4-level 4-wire (2B4L4W) signaling scheme is proposed, which maps
two bits of information to four values distributed over four wires. The signaling scheme …