Hardware Trojan detection with node reduction using static timing analysis

Hardware Trojan designs based on high-low probability and partitioned combinational logic with a malicious reset signal

J Shi, X Zhang, P Ma, W Pan, P Li… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
To counteract logic-testing methods and trust verification methods for hardware Trojan (HT)
detection, two HT design strategies based on high-low probability and partitioned …
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