Area efficient layout design of CMOS circuit for high-density ICs

VK Mishra, RK Chauhan - International Journal of Electronics, 2018 - Taylor & Francis
Efficient layouts have been an active area of research to accommodate the greater number
of devices fabricated on a given chip area. In this work a new layout of CMOS circuit is …

Analysis of RSNM and WSNM of 6T SRAM cell using ultra thin body FD-SOI MOSFET

VK Mishra, N Yadava, K Nigam, B Bansal… - Advances in Signal …, 2019 - Springer
The read and write stability of SRAM cell depends on the high-performance CMOS
technologies (FD-SOI technology), due to low power dissipation, and high switching and …

Performance Analysis of Hetero-Dielectric Stacked Buried Oxide on Modified Source-Drain FDSOI MOS Transistor

S Rai, RK Chauhan - Advances in VLSI, Communication, and Signal …, 2022 - Springer
In this paper, a proposed structure of hetero-dielectric stacked buried oxide on the modified
source-drain fully depleted silicon on insulator (HB MS-MD FDSOI). It presents improved …

Mathematical modelling of kink effect in deep-submicron FDSOIMOSFET

S Bhattacharya, P Ray, J Sanyal - 2018 Emerging Trends in …, 2018 - ieeexplore.ieee.org
The kink effect has been observed in deep-submicron Fully Depleted Silicon-On-Insulator
(FDSOI) MOSFETs and the corresponding devices have also been studied through physical …

Improvement of Electrical Characteristics for Nanoscale Single-Gate FDSOI Using Gate Oxide Engineering

A Kushwaha, SS Upadhyay, N Yadava… - VLSI, Microwave and …, 2022 - Springer
In this paper, various heterodielectric gate oxide-based (HDGO) fully depleted silicon-on-
insulator (FDSOI) arrangements are considered, ie, dual heterodielectric gate oxide …

Heterodielectric-Based Gate Oxide Stack Engineering in FDSOI Structure with Enhanced Analog Performance

A Kushwaha, N Yadava, MD Gupta… - VLSI, Microwave and …, 2022 - Springer
This paper presents the examination on the analog execution of a heterodielectric materials
gate oxide-based fully depleted silicon-on-insulator (FDSOI) metal oxide semiconductor …

Impact of BOX Thickness Scaling on Channel Modulated Electric Field of DC-EFM FD-SOI MOSFET

V Mishra, B Bansal, RK Chauhan - … International Conference on …, 2019 - ieeexplore.ieee.org
Incurrent scenario theFD-SOI MOSFET considered as one of the potential candidate for
higher electrical performance. This paper presents an analysis of developed channel SOI …

[引用][C] Performance Analysis of Dual Metal Gate Modified Source Fully Depleted SOI MOSFET

S Tripathi, VK Mishra… - i-Manager's Journal on …, 2016 - iManager Publications

[引用][C] Performance Analysis of Modified Source Junctionless Fully Depleted Silicon-on-Insulator MOSFET

M Chauhan - i-Manager's Journal on Electronics …, 2017 - iManager Publications