Flexibility in softwarized networks: Classifications and research challenges

M He, AM Alba, A Basta, A Blenk… - … Surveys & Tutorials, 2019 - ieeexplore.ieee.org
The increase of flexibility is a common objective of softwarized networks based on concepts,
such as software defined networking, network function virtualization, and network …

Modular routing design for chiplet-based systems

J Yin, Z Lin, O Kayiran, M Poremba… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
System-on-Chip (SoC) complexity and the increasing costs of silicon motivate the breaking
of an SoC into smaller" chiplets." A chiplet-based SoC design process has the promise to …

A reliable routing architecture and algorithm for NoCs

A DeOrio, D Fick, V Bertacco… - … on Computer-Aided …, 2012 - ieeexplore.ieee.org
Aggressive transistor scaling continues to drive increasingly complex digital designs. The
large number of transistors available today enables the development of chip multiprocessors …

Segment-based routing: An efficient fault-tolerant routing algorithm for meshes and tori

A Mejia, J Flich, J Duato, SA Reinemo… - … 20th IEEE International …, 2006 - ieeexplore.ieee.org
Computers get faster every year, but the demand for computing resources seems to grow at
an even faster rate. Depending on the problem domain, this demand for more power can be …

A survey and evaluation of topology-agnostic deterministic routing algorithms

J Flich, T Skeie, A Mejia, O Lysne… - … on Parallel and …, 2011 - ieeexplore.ieee.org
Most standard cluster interconnect technologies are flexible with respect to network
topology. This has spawned a substantial amount of research on topology-agnostic routing …

Ariadne: Agnostic reconfiguration in a disconnected network environment

K Aisopos, A DeOrio, LS Peh… - … conference on parallel …, 2011 - ieeexplore.ieee.org
Extreme transistor technology scaling is causing increasing concerns in device reliability:
the expected lifetime of individual transistors in complex chips is quickly decreasing, and the …

Region-based routing: a mechanism to support efficient routing algorithms in NoCs

A Mejia, M Palesi, J Flich, S Kumar… - … Transactions on Very …, 2009 - ieeexplore.ieee.org
An efficient routing algorithm is important for large on-chip networks [network-on-chip (NoC)]
to provide the required communication performance to applications. Implementing NoC …

Towards robustness to fast speech in ASR

N Mirghafori, E Fosler, N Morgan - 1996 IEEE International …, 1996 - ieeexplore.ieee.org
Psychoacoustic studies show that human listeners are sensitive to speaking rate variations.
Automatic speech recognition (ASR) systems are even more affected by the changes in rate …

Routing on the dependency graph: A new approach to deadlock-free high-performance routing

J Domke, T Hoefler, S Matsuoka - proceedings of the 25th ACM …, 2016 - dl.acm.org
Lossless interconnection networks are omnipresent in high performance computing
systems, data centers and network-on-chip architectures. Such networks require efficient …

An effective design of deadlock-free routing algorithms based on 2d turn model for irregular networks

A Jouraku, M Koibuchi, H Amano - IEEE Transactions on …, 2007 - ieeexplore.ieee.org
System area networks (SANs), which usually accept arbitrary topologies, have been used to
connect hosts in PC clusters. Although deadlock-free routing is often employed for low …