In the current information age, the realization of memory devices with energy efficient
design, high storage density, nonvolatility, fast access, and low cost is still a great challenge …

As silicon technology enters sub-20nm nodes, new materials, structures and processes are
being introduced in order to continue with the advantages of dimensional scaling, eg, 3D …

The computing demands of future data-intensive applications will greatly exceed the
capabilities of current electronics, and are unlikely to be met by isolated improvements in …

The monolithic server model where a server is the unit of deployment, operation, and failure
is meeting its limits in the face of several recent hardware and application trends. To improve …

As computation becomes increasingly limited by data movement and energy consumption,
exploiting locality throughout the memory hierarchy becomes critical to continued …

In current systems, memory accesses to a DRAM chip must obey a set of minimum latency
restrictions specified in the DRAM standard. Such timing parameters exist to guarantee …

To increase datacenter energy efficiency, we need memory systems that keep pace with
processor efficiency gains. Currently, servers use DDR3 memory, which is designed for high …

Recent research advocates using large die-stacked DRAM caches to break the memory
bandwidth wall. Existing DRAM cache designs fall into one of two categories---block-based …

In this paper, we assess the past, present, and future of mobile CPU design. We study how
mobile CPU designs trends have impacted the end-user, hardware design, and the holistic …

Applications extensively use data objects with a regular and fixed layout, which leads to the
recurrence of access patterns over memory regions. Spatial data prefetching techniques …