[图书][B] System-on-chip test architectures: nanometer design for testability

LT Wang, CE Stroud, NA Touba - 2010 - books.google.com
Modern electronics testing has a legacy of more than 40 years. The introduction of new
technologies, especially nanometer technologies with 90nm or smaller geometry, has …

Stochastic formulation of SPICE-type electronic circuit simulation with polynomial chaos

K Strunz, Q Su - ACM Transactions on Modeling and Computer …, 2008 - dl.acm.org
A methodology for efficient tolerance analysis of electronic circuits based on nonsampling
stochastic simulation of transients is formulated, implemented, and validated. We model the …

Model order reduction of parameterized interconnect networks via a two-directional Arnoldi process

YT Li, Z Bai, Y Su, X Zeng - IEEE Transactions on Computer …, 2008 - ieeexplore.ieee.org
This paper presents a multiparameter moment-matching-based model order reduction
technique for parameterized interconnect networks via a novel two-directional Arnoldi …

Testing on-die process variation in nanometer VLSI

M Nourani, A Radhakrishnan - IEEE Design & Test of …, 2006 - ieeexplore.ieee.org
Ring oscillators are not new, but the authors of this article use them in a novel,
unconventional way to monitor process variation at different regions of a die in the frequency …

A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology

H Zhu, X Zeng, W Cai, J Xue… - 2007 Design, Automation …, 2007 - ieeexplore.ieee.org
In this paper, a spectral stochastic collocation method (SSCM) is proposed for the
capacitance extraction of interconnects with stochastic geometric variations for nanometer …

Robustness of multi-modal biometric verification systems under realistic spoofing attacks

B Biggio, Z Akthar, G Fumera… - … Joint Conference on …, 2011 - ieeexplore.ieee.org
Recent works have shown that multi-modal biometric systems are not robust against
spoofing attacks [12, 15, 13]. However, this conclusion has been obtained under the …

Stochastic sparse-grid collocation algorithm (SSCA) for periodic steady-state analysis of nonlinear system with process variations

J Tao, X Zeng, W Cai, Y Su, D Zhou… - 2007 Asia and South …, 2007 - ieeexplore.ieee.org
In this paper, stochastic collocation algorithm combined with sparse grid technique (SSCA)
is proposed to deal with the periodic steady-state analysis for nonlinear systems with …

Efficient decoupling capacitance budgeting considering operation and process variations

Y Shi, J Xiong, C Liu, L He - IEEE Transactions on Computer …, 2008 - ieeexplore.ieee.org
This paper solves the variation-aware decoupling capacitance (decap) budgeting problem.
Unlike previous works which only consider worst case design, for the first time, we consider …

Fast variational analysis of on-chip power grids by stochastic extended Krylov subspace method

N Mi, SXD Tan, Y Cai, X Hong - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
This paper proposes a novel stochastic method for analyzing the voltage drop variations of
on-chip power grid networks, considering lognormal leakage current variations. The new …

[图书][B] Statistical performance analysis and modeling techniques for nanometer VLSI designs

R Shen, SXD Tan, H Yu - 2012 - books.google.com
Since process variation and chip performance uncertainties have become more pronounced
as technologies scale down into the nanometer regime, accurate and efficient modeling or …