Accelerated deep learning
S Lie, M Morrison, ME James, GR Lauterbach… - US Patent …, 2020 - Google Patents
Techniques in advanced deep learning provide improvements in one or more of accuracy,
performance, and energy efficiency, such as accuracy of learning, accuracy of prediction …
performance, and energy efficiency, such as accuracy of learning, accuracy of prediction …
Wavelet representation for accelerated deep learning
S Lie, GR Lauterbach, ME James, M Morrison… - US Patent …, 2019 - Google Patents
2019-07-09 Assigned to CEREBRAS SYSTEMS INC. reassignment CEREBRAS SYSTEMS
INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS) …
INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS) …
Ant lion optimized bufferless routing in the design of low power application specific network on chip
NL Venkataraman, R Kumar, PM Shakeel - Circuits, Systems, and Signal …, 2020 - Springer
Network on chip is widely restricted with power utilization and area occupation due to the
usage of buffers. Hence, the design of bufferless architecture entirely eliminates such kind of …
usage of buffers. Hence, the design of bufferless architecture entirely eliminates such kind of …
Dataflow triggered tasks for accelerated deep learning
S Lie, GR Lauterbach, ME James, M Morrison… - US Patent …, 2020 - Google Patents
2019-07-09 Assigned to CEREBRAS SYSTEMS INC. reassignment CEREBRAS SYSTEMS
INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS) …
INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS) …
Data structure descriptors for deep learning acceleration
S Lie, M Morrison, S Arekapudi… - US Patent …, 2020 - Google Patents
Techniques in advanced deep learning provide improvements in one or more of accuracy,
performance, and energy efficiency. An array of processing elements performs flow-based …
performance, and energy efficiency. An array of processing elements performs flow-based …
Backpressure for accelerated deep learning
S Lie, GR Lauterbach, ME James, M Morrison… - US Patent …, 2020 - Google Patents
Techniques in advanced deep learning provide improvements in one or more of accuracy,
performance, and energy efficiency. An array of processing elements performs flow-based …
performance, and energy efficiency. An array of processing elements performs flow-based …
Control wavelet for accelerated deep learning
S Lie, GR Lauterbach, ME James, M Morrison… - US Patent …, 2020 - Google Patents
Techniques in advanced deep learning provide improvements in one or more of accuracy,
performance, and energy efficiency. An array of processing elements performs flow based …
performance, and energy efficiency. An array of processing elements performs flow based …
MMNNN: A tree-based Multicast Mechanism for NoC-based deep Neural Network accelerators
Y Ouyang, F Tang, C Hu, W Zhou, Q Wang - Microprocessors and …, 2021 - Elsevier
Abstract Network-on-Chip (NoC) devices have been widely used in multiprocessor systems.
In recent years, NoC-based Deep Neural Network (DNN) accelerators have been proposed …
In recent years, NoC-based Deep Neural Network (DNN) accelerators have been proposed …
Controller node driven hop count based data distribution algorithm in ring connected binary tree network-on-chip for parallel processing
R Uma, H Sarojadevi, V Sanju - International Journal of Information …, 2024 - Springer
An effective distribution of packets is particularly important for the performance of a network-
on-chip system. Ring connected binary tree structures do not have a defined distribution …
on-chip system. Ring connected binary tree structures do not have a defined distribution …
An efficient dataflow accelerator for scientific applications
X Ye, X Tan, M Wu, Y Feng, D Wang, H Zhang… - Future Generation …, 2020 - Elsevier
Dataflow architecture has been proved to be promising in high-performance computing.
Traditional dataflow architectures are not efficient enough in typical scientific applications …
Traditional dataflow architectures are not efficient enough in typical scientific applications …