Unarbitrated contention over shared resources at different levels of the memory hierarchy
represents a major source of temporal interference. Hardware manufacturers are …

Tasks in modern multi-core real-time systems share data and communicate among each
other. Nonetheless, the majority of published research in real-time systems either assumes …

Heterogeneous SoC platforms, comprising both general purpose CPUs and accelerators,
such as a GPU, are becoming increasingly attractive for real-time and mixed-criticality …

The demands for high performance computing with a low cost and low power consumption
are driving a transition towards multi-core processors in many consumer and industrial …

Shared caches in multi-core processors seriously complicate the timing verification of real-
time software tasks due to the task interference occurring in the shared caches. Explicitly …

Newly emerging multiprocessor system-on-a-chip (MPSoC) platforms provide hard
processing cores with programmable logic (PL) for high-performance computing …

Obtaining and bounding real-time tasks' worst-case execution times (WCETs) on NVIDIA
GPU-based systems is challenging because the details of hardware and drivers are …

Recently, works on integrating HTM with STM, called hybrid transactional memory (HyTM),
have intensively studied. However, the existing works consider only the prediction of a …

Whether one or multiple hardware execution units are activated (ie CPU cores), invalid
resource sharing, notably due to simultaneous accesses, proves to be problematic as it can …

Multicore systems will continue to spread in the domain of real-time embedded systems due
to the increasing need for high-performance applications. This research discusses some of …