The determination of upper bounds on execution times, commonly called worst-case
execution times (WCETs), is a necessary step in the development and validation process for …

In multiprocessor systems, the traffic on the bus does not solely originate from data transfers
due to data dependencies between tasks, but is also affected by memory transfers as result …

Without the use of caches the increasing gap between processor and memory speeds in
modern embedded microprocessors would have resulted in memory access times becoming …

Increasing the capacity of the Last Level Cache (LLC) can help scale the memory wall. Due
to prohibitive area and leakage power, however, growing conventional SRAM LLC already …

Real-time systems are reactive computer systems that must produce their reaction to a
stimulus within given time bounds. A vital verification requirement is to estimate the Worst …

Without the use of cache the increasing gap between processor and memory speeds in
modern embedded microprocessors would have resulted in memory access times becoming …

A central issue for verifying the schedulability of hard real-time systems is the correct
evaluation of task execution times. These values are significantly influenced by the …

In hard real-time systems, cache partitioning is often suggested as a means of increasing the
predictability of caches in pre-emptively scheduled systems: when a task is assigned its own …

Predicting timing behavior is key to reliable real-time system design and verification, but
becomes increasingly difficult for current multiprocessor systems on chip. The integration of …

Timing compositionality is assumed by almost all multicore timing analyses. In this paper, we
show that compositional timing analysis can be incorrect even for simple microarchitectures …