Data prefetching, ie, the act of predicting an application's future memory accesses and fetching those that are not in the on-chip caches, is a well-known and widely used approach …
H Zheng, K Wang, A Louri - 2021 IEEE international symposium …, 2021 - ieeexplore.ieee.org
The increased computational capability in heterogeneous manycore architectures facilitates the concurrent execution of many applications. This requires, among other things, a flexible …
Abstract Networks-on-Chip (NoC) architectures have become the mainstream communication backbone of high-end processors and systems-on-chip (SoCs) after their …
H Zheng, K Wang, A Louri - 2020 57th ACM/IEEE Design …, 2020 - ieeexplore.ieee.org
Heterogeneous manycore architectures are deployed to simultaneously run multiple and diverse applications. This requires various computing capabilities (CPUs, GPUs, and …
Emerging chips with hundreds and thousands of cores require networks with unprecedented energy/area efficiency and scalability. To address this, we propose Slim NoC (SN): a new on …
L Yin, A Ghazizadeh, A Louri… - 2023 IEEE/ACM …, 2023 - ieeexplore.ieee.org
Large-scale deep learning models are widely deployed in many application domains with remarkable performance improvements. However, training these models with immense …
Nowadays, static power consumption in chip multiprocessor (CMP) is the most crucial concern of chip designers. Power-gating is an effective approach to mitigate static power …
Wearable devices are now leveraging multi-core processors to cater to the increasing computational demands of the applications via multi-threading. However, the power …
On-chip communication is the bottleneck of system performance for NoC-based MPSoCs. SMART, a recently proposed NoC architecture, enables single-cycle multi-hop …