Single-inductor multiple-output switching converters with time-multiplexing control in discontinuous conduction mode

D Ma, WH Ki, CY Tsui, PKT Mok - IEEE Journal of Solid-State …, 2003 - ieeexplore.ieee.org
An integrated single-inductor dual-output boost converter is presented. This converter
adopts time-multiplexing control in providing two independent supply voltages (3.0 and 3.6 …

A pseudo-CCM/DCM SIMO switching converter with freewheel switching

D Ma, WH Ki, CY Tsui - IEEE Journal of solid-state circuits, 2003 - ieeexplore.ieee.org
This paper presents a single-inductor multiple-output (SIMO) converter operating in pseudo-
continuous conduction mode (PCCM) and/or discontinuous conduction mode (DCM). With …

Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors

T Karnik, Y Ye, J Tschanz, L Wei, S Burns… - Proceedings of the 39th …, 2002 - dl.acm.org
We describe various design automation solutions for design migration to a dual-Vt process
technology. We include the results of a Lagrangian Relaxation based tool, iSTATS, and a …

An integrated one-cycle control buck converter with adaptive output and dual loops for output error correction

D Ma, WH Ki, CY Tsui - IEEE Journal of Solid-State Circuits, 2004 - ieeexplore.ieee.org
An integrated adaptive-output switching converter is presented. This converter adopts one-
cycle control for fast line response and dual error correction loops for tight load regulation. A …

TNT digital pulse processor

L Arnold, R Baumann, E Chambit… - … on Nuclear Science, 2006 - ieeexplore.ieee.org
We report on the development of Tracking Numerical Treatment (TNT) boards, which are the
basic bricks of a more ambitious data acquisition system intended for online data acquisition …

Comparing performances of SIDO buck converters

G Nayak, S Nath - … on Power Electronics, Drives and Energy …, 2018 - ieeexplore.ieee.org
This paper compares two topologies of single input dual output (SIDO) buck converters. The
two topologies explored in literature for SIDO buck converters are based on the single …

CAD for nanometer silicon design challenges and success

JT Kong - IEEE Transactions on Very Large Scale Integration …, 2004 - ieeexplore.ieee.org
As silicon CMOS technology is scaled into the nanometer regime, the paradigm shift of
computer-aided design (CAD) technology is indispensable to cope with two major …

System level power-performance trade-offs in embedded systems using voltage and frequency scaling of off-chip buses and memory

K Puttaswamy, KW Choi, JC Park… - Proceedings of the 15th …, 2002 - dl.acm.org
In embedded systems, off-chip buses and memory (ie, L2 memory as opposed to the L1
memory which is usually on-chip cache) consume significant power, often more than the …

An architectural level energy reduction technique for deep-submicron cache memories

T Ishihara, K Asada - Proceedings of ASP-DAC/VLSI Design …, 2002 - ieeexplore.ieee.org
An architectural level technique for a high performance and low energy cache memory is
proposed in this paper. The key idea of our approach is to divide a cache memory into …

Digitally controlled integrated pseudo-CCM SIMO converter with adaptive freewheel current modulation

Y Zhang, D Ma - 2010 Twenty-Fifth Annual IEEE Applied Power …, 2010 - ieeexplore.ieee.org
In this paper, a digitally controlled integrated single-inductor multiple-output (SIMO)
converter operating in pseudo-CCM (PCCM) mode is presented. With an adaptive freewheel …