The sensitivity of circuit input vectors plays an important role in estimating circuit reliability
bounds and identifying reliability-critical gates. Consequently, to effectively calculate the …

A commonly used approach to compute the error rate at the primary outputs (POs) of a circuit
is to compare the fault-free and faulty copies of the circuit using XOR gates. This model …

Until recently, reliability was not considered to be a major design concern for circuit
designers, except in the case of space and mission critical applications. However, the …

As the sizes of CMOS devices rapidly scale deep into the nanometer range, the manufacture
of nanocircuits will become extremely complex and will inevitably introduce more defects …

This paper suggests a transistor sizing method for classical CMOS gates implemented in
advanced technology nodes and operating at low voltages. The method relies on upsizing …

With emerging nanometric technologies, multiple valued logic (MVL) circuits have attracted
significant attention due to advantages in information density and operating speed. In this …

Transmissions over unreliable networks, for example, wireless, can lead to packet loss. An
area that has received limited research attention is how to tailor multimedia information …

在电路设计的早期阶段, 成品率与可靠性的关系模型对于预测和改善电路的成品率和可靠性具有
极为重要的意义. 结合广义门电路的版图结构与拓扑结构信息, 分析了其缺陷密度及成品率和 …

This paper revisits a transistor sizing method for CMOS gates, which relies on upsizing the
length (L) and balancing the voltage transfer characteristics for maximizing the static noise …

Представлен ряд методов повышения производительности вычислений при расчете
метрик надежности комбинационных логических схем. В основе предлагаемых …