Accelerating CNN inference on ASICs: A survey

D Moolchandani, A Kumar, SR Sarangi - Journal of Systems Architecture, 2021 - Elsevier
Convolutional neural networks (CNNs) have proven to be a disruptive technology in most
vision, speech and image processing tasks. Given their ubiquitous acceptance, the research …

An overview of efficient interconnection networks for deep neural network accelerators

SM Nabavinejad, M Baharloo, KC Chen… - IEEE Journal on …, 2020 - ieeexplore.ieee.org
Deep Neural Networks (DNNs) have shown significant advantages in many domains, such
as pattern recognition, prediction, and control optimization. The edge computing demand in …

Sigma: A sparse and irregular gemm accelerator with flexible interconnects for dnn training

E Qin, A Samajdar, H Kwon, V Nadella… - … Symposium on High …, 2020 - ieeexplore.ieee.org
The advent of Deep Learning (DL) has radically transformed the computing industry across
the entire spectrum from algorithms to circuits. As myriad application domains embrace DL, it …

Simba: Scaling deep-learning inference with multi-chip-module-based architecture

YS Shao, J Clemons, R Venkatesan, B Zimmer… - Proceedings of the …, 2019 - dl.acm.org
Package-level integration using multi-chip-modules (MCMs) is a promising approach for
building large-scale systems. Compared to a large monolithic die, an MCM combines many …

Beyond data and model parallelism for deep neural networks.

Z Jia, M Zaharia, A Aiken - Proceedings of Machine Learning …, 2019 - proceedings.mlsys.org
Existing deep learning systems commonly parallelize deep neural network (DNN) training
using data or model parallelism, but these strategies often result in suboptimal …

[图书][B] Efficient processing of deep neural networks

V Sze, YH Chen, TJ Yang, JS Emer - 2020 - Springer
This book provides a structured treatment of the key principles and techniques for enabling
efficient processing of deep neural networks (DNNs). DNNs are currently widely used for …

Interstellar: Using halide's scheduling language to analyze dnn accelerators

X Yang, M Gao, Q Liu, J Setter, J Pu, A Nayak… - Proceedings of the …, 2020 - dl.acm.org
We show that DNN accelerator micro-architectures and their program mappings represent
specific choices of loop order and hardware parallelism for computing the seven nested …

Cosa: Scheduling by constrained optimization for spatial accelerators

Q Huang, M Kang, G Dinh, T Norell… - 2021 ACM/IEEE 48th …, 2021 - ieeexplore.ieee.org
Recent advances in Deep Neural Networks (DNNs) have led to active development of
specialized DNN accelerators, many of which feature a large number of processing …

Gamma: Automating the hw mapping of dnn models on accelerators via genetic algorithm

SC Kao, T Krishna - Proceedings of the 39th International Conference on …, 2020 - dl.acm.org
DNN layers are multi-dimensional loops that can be ordered, tiled, and scheduled in myriad
ways across space and time on DNN accelerators. Each of these choices is called a …

A systematic methodology for characterizing scalability of dnn accelerators using scale-sim

A Samajdar, JM Joseph, Y Zhu… - … Analysis of Systems …, 2020 - ieeexplore.ieee.org
The compute demand for deep learning workloads is well known and is a prime motivator for
powerful parallel computing platforms such as GPUs or dedicated hardware accelerators …