Progress and challenges in VLSI placement research

IL Markov, J Hu, MC Kim - … of the International Conference on Computer …, 2012 - dl.acm.org
Given the significance of placement in IC physical design, extensive research studies
performed over the last 50 years addressed numerous aspects of global and detailed …

[图书][B] Architecture and CAD for deep-submicron FPGAs

V Betz, J Rose, A Marquardt - 2012 - books.google.com
Since their introduction in 1984, Field-Programmable Gate Arrays (FPGAs) have become
one of the most popular implementation media for digital circuits and have grown into a $2 …

Repeater scaling and its impact on CAD

P Saxena, N Menezes, P Cocchini… - IEEE Transactions on …, 2004 - ieeexplore.ieee.org
We study scaling in the context of typical block-level wiring distributions, and identify its
impact on the design process. In particular, we study the implications of exponentially …

Generic global placement and floorplanning

H Eisenmann, FM Johannes - Proceedings of the 35th annual Design …, 1998 - dl.acm.org
We present a new force directed method for global placement. Besides the well-known wire
length dependent forces we use additional forces to reduce cell overlaps and to consider the …

Timing-driven placement for FPGAs

A Marquardt, V Betz, J Rose - Proceedings of the 2000 ACM/SIGDA …, 2000 - dl.acm.org
In this paper we introduce a new Simulated Annealing-based timing-driven placement
algorithm for FPGAs. This paper has three main contributions. First, our algorithm employs a …

Can recursive bisection alone produce routable placements?

AE Caldwell, AB Kahng, IL Markov - Proceedings of the 37th annual …, 2000 - dl.acm.org
This work focuses on congestion-driven placement of standard cells into rows in the fixed-
die context. We summarize the state-of-the-art after two decades of research in recursive …

Constraint-based watermarking techniques for design IP protection

AB Kahng, J Lach, WH Mangione-Smith… - … on Computer-Aided …, 2001 - ieeexplore.ieee.org
Digital system designs are the product of valuable effort and know-how. Their embodiments,
from software and hardware description language program down to device-level netlist and …

Implementation and extensibility of an analytic placer

AB Kahng, Q Wang - Proceedings of the 2004 international symposium …, 2004 - dl.acm.org
Automated cell placement is a critical problem in VLSI physical design. New analytical
placement methods that simultaneously spread cells and optimize wirelength have recently …

Interconnect design for deep submicron ICs

Z Pan, L He, CK Koh, KY Khoo - 1997 Proceedings of IEEE …, 1997 - ieeexplore.ieee.org
Interconnect has become the dominating factor in determining circuit performance and
reliability in deep submicron designs. In this embedded tutorial, we first discuss the trends …

FastRoute: A step to integrate global routing into placement

M Pan, C Chu - Proceedings of the 2006 IEEE/ACM international …, 2006 - dl.acm.org
Because of the increasing dominance of interconnect issues in advanced IC technology,
placement has become a critical step in the IC design flow. To get accurate interconnect …