A processor for performing floating-point operations includes an array of processing
elements arranged to enable a floating-point operation. Each processing element includes …

This paper describes the implementation of an 8-bit Vedic multiplier enhanced in terms of
propagation delay when compared with conventional multiplier like array multiplier, Braun …

Abstract Designing Arithmetic Logic Unit (ALU) is a combinational logic problem. As ALU
has a regular pattern, it can be broken into identical stages connected into cascade through …

This paper describes the implementation of an 8-bit Vedic multiplier using fast adder
enhanced in terms of propagation delay when compared with conventional multiplier. In our …

32x32-bit multiply accumulate (MAC) unit designed using ancient Vedic mathematical
techniques. This research work presents the efficiency of Urdhva Triyagbhyam Vedic …

Abstract Background/Objectives: The main objective of the paper is to implement a
reconfigurable ALU that is a combination of a 32-bit floating point adder/subtractor and …

An Arithmetic logic Unit (ALU) is used in arithmetic, logical function in all processor. It is also
an important subsystem in digital system design. Arithmetic Logic Unit (ALU) is one of the …

This paper proposed the design of 8 Bit Vedic Multiplier using the techniques of Ancient
Indian Vedic Mathematics that have been modified to improve performance. Vedic …

The paper describes the implementation of 8-bit vedic multiplier using complex numbers
previous technique describes that 8-bit vedic multiplier using barrel shifter by FPGA …

A General purpose microprocessor is one having the capability to execute the usual set of
instructions like arithmetic, logic, branching and other control instructions. It is consisting of a …