Comparative Investigation of Band Gap and Gate Metal Engineered Novel Si0.2Ge0.8/GaAs Charge Plasma-Based JLTFET for Improved Electrical Performance
Abstract Tunnel FETs (TFETs) need to meet certain conditions to be useful for analog/RF
circuit applications, including a steep subthreshold slope, high current driving capability, and …
circuit applications, including a steep subthreshold slope, high current driving capability, and …
High Current Density Vertical Nanowire TFETs with I60>1μA/μm
G Rangasamy, Z Zhu, LE Wernersson - IEEE Access, 2023 - ieeexplore.ieee.org
We present experimental data for a vertical, 22-nm-diameter InAs/(In) GaAsSb nanowire
Tunnel Field-Effect Transistor that exhibits the highest reported I60 of, paving the way for low …
Tunnel Field-Effect Transistor that exhibits the highest reported I60 of, paving the way for low …
Recent progress of group III-V materials-based nanostructures for photodetection
X Cong, H Yin, Y Zheng, W He - Nanotechnology, 2024 - iopscience.iop.org
Due to the suitable bandgap structure, efficient conversion rates of photon to electron,
adjustable optical bandgap, high electron mobility/aspect ratio, low defects, and outstanding …
adjustable optical bandgap, high electron mobility/aspect ratio, low defects, and outstanding …
Integration of Ferroelectric HfxZr1-xO2 on Vertical III-V Nanowire Gate-All-Around FETs on Silicon
We demonstrate a successful process scheme for the integration of a CMOS-compatible
ferroelectric gate stack on a scaled vertical InAs nanowire gate-all-around MOSFET on …
ferroelectric gate stack on a scaled vertical InAs nanowire gate-all-around MOSFET on …
Initialization of Nanowire or Cluster Growth Critically Controlled by the Effective V/III Ratio at the Early Nucleation Stage
C Chen, Y Chu, L Zhang, H Lin, W Fang… - The Journal of …, 2023 - ACS Publications
For self-catalyzed nanowires (NWs), reports on how the catalytic droplet initiates successful
NW growth are still lacking, making it difficult to control the yield and often accompanying a …
NW growth are still lacking, making it difficult to control the yield and often accompanying a …
Low-Power, Self-Aligned Vertical InGaAsSb NW PMOS With S< 100 mV/dec
A Krishnaraja, Z Zhu, J Svensson… - IEEE Electron Device …, 2023 - ieeexplore.ieee.org
III-V co-integration is less mature compared to Si/Ge CMOS due to their inferior pMOS
device performance. This letter adopts a novel quaternary InGaAsSb channel material in a …
device performance. This letter adopts a novel quaternary InGaAsSb channel material in a …
[HTML][HTML] Hydrogen plasma enhanced oxide removal on GaSb planar and nanowire surfaces
Due to its high hole-mobility, GaSb is a highly promising candidate for high-speed p-
channels in electronic devices. However, GaSb exhibits a comparably thick native oxide …
channels in electronic devices. However, GaSb exhibits a comparably thick native oxide …