Optimizing Network-on-Chip using metaheuristic algorithms: A comprehensive survey

M Masdari, SN Qasem, HT Pai - Microprocessors and Microsystems, 2023 - Elsevier
Abstract Network on Chip (NoC) is an interesting technology that benefits from several
processing elements and the necessary communication facilities, to provide an answer to …

A survey and taxonomy of congestion control mechanisms in wireless network on chip

F Rad, M Reshadi, A Khademzadeh - Journal of Systems Architecture, 2020 - Elsevier
Wireless network on chip (WiNoC) has been proposed as a promising solution for on-chip
interconnection network due to high scalability, high bandwidth, and low latency. However …

A systematic analysis of power saving techniques for wireless network-on-chip architectures

F Yazdanpanah, R Afsharmazayejani - Journal of Systems Architecture, 2022 - Elsevier
Wireless network-on-chip (WNoC, aka WiNoC) architectures, as an emerging and viable
alternative approach, overcome the communication constraints and drawbacks of network …

A two-level network-on-chip architecture with multicast support

F Yazdanpanah - Journal of Parallel and Distributed Computing, 2023 - Elsevier
It is essential for implementing processing systems of edge computing, internet of things
(IoT) and wireless multimedia sensor networks (WMSN) to use low-power parallel and …

A low-power wnoc transceiver with a novel energy consumption management scheme for dependable iot systems

F Yazdanpanah - Journal of Parallel and Distributed Computing, 2023 - Elsevier
Wireless network-on-chip architectures (WNoCs), by combining wired and wireless modules
and links, provide fast and efficient communication infrastructures for complex on-chip …

An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chip

F Yazdanpanah, R AfsharMazayejani, M Alaei… - The Journal of …, 2019 - Springer
In the current many-core architectures, network-on-chips (NoCs) have been efficiently
utilized as communication backbones for enabling massive parallelism and high degree of …

A fault-tolerant and congestion-aware architecture for wireless networks-on-chip

SH Mortazavi, R Akbar, F Safaei, A Rezaei - Wireless Networks, 2019 - Springer
The combination of traditional wired links for regular transmissions and express wireless
paths for long distance communications is a promising solution to prevent multi-hop network …

A Survey on Heterogeneous CPU–GPU Architectures and Simulators

M Alaei, F Yazdanpanah - Concurrency and Computation …, 2025 - Wiley Online Library
Heterogeneous architectures are vastly used in various high performance computing
systems from IoT‐based embedded architectures to edge and cloud systems. Although …

H2WNoC: A honeycomb hardware-efficient wireless network-on-chip architecture

M Alaei, F Yazdanpanah - Nano Communication Networks, 2019 - Elsevier
Abstract Network-on-chips (NoCs) have emerged as communication backbones for enabling
massive parallelism and high degree of integration in many-core chips. In spite of the …

RETRACTED:: Design and implementation of network‐on‐chip router using multi‐priority based iterative round‐robin matching with slip

S Singh, JVR Ravindra, BR Naik - Transactions on Emerging …, 2024 - dl.acm.org
Abstract Nowadays, network‐on‐chip (NoC) routers become important in several
applications including mobile technology and digital communication. Multiple …