A novel power-efficient architecture for high-speed flash ADCs
M Moslemi… - 2014 22nd Iranian …, 2014 - ieeexplore.ieee.org
In this paper, a new architecture for a low-power highspeed Flash Analog-to-Digital
Converter (ADC) is presented. Unlike conventional Full-Flash architecture in which power …
Converter (ADC) is presented. Unlike conventional Full-Flash architecture in which power …
An effective 3-bit Flash Analog to Digital Converter using 45-nm Technology
A Pathak, S Akashe - Proceedings of the 2014 International Conference …, 2014 - dl.acm.org
In analog and digital converters are tragedies dynamic parts during creation of voltaic
structures. This paper, a 0.7-V, 3-bit CMOS flash analog to digital converter is presented at …
structures. This paper, a 0.7-V, 3-bit CMOS flash analog to digital converter is presented at …
Expandable Flash-Type CMOS Analog-to-Digital Converter for Sensor Signal Processing
CW Oh, BS Choi, JT Kim, SH Seo… - Journal of Sensor …, 2017 - koreascience.kr
The analog-to-digital converter (ADC) is an important component in various fields of sensor
signal processing. This paper presents an expandable flash analog-to-digital converter (E …
signal processing. This paper presents an expandable flash analog-to-digital converter (E …
Low Power Thermometer code to Binary code Encoder based Flash ADC
D SP - 2014 - ethesis.nitrkl.ac.in
Architectural level design of a low power Thermometer code to Binary code Encoder for a
Flash ADC of 4 bit resolution is presented. In the proposed architecture the thermometer …
Flash ADC of 4 bit resolution is presented. In the proposed architecture the thermometer …
A 6-bit Low-Power High-Speed Flash ADC using 180 nm CMOS process
In this paper we present a design of Flash-ADC that can achieve high performance and low
power consumption. By using the Double Sampling Rate technique and a new comparator …
power consumption. By using the Double Sampling Rate technique and a new comparator …
A 1.25 Gsps 0.35 um SiGe BiCMOS Track and Hold Circuit
RB Hu, XY Zhang - Advanced Materials Research, 2013 - Trans Tech Publ
In this paper, a novel track and hold circuit in 0.35 um SiGe BiCMOS process is presented.
Compared to the traditional one, several improvements are made on the proposed track and …
Compared to the traditional one, several improvements are made on the proposed track and …
Comparator-multiplexer based 6 bit 1.4 GSPS low power ADC
This paper presents a comparator-analog multiplexer based 6 bit analog to digital converter
(ADC) using repetitive block of 2* 1 multiplexer. The multiplexer is designed using …
(ADC) using repetitive block of 2* 1 multiplexer. The multiplexer is designed using …