A reliable low standby power 10T SRAM cell with expanded static noise margins

E Abbasian, F Izadinasab… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
This paper explores a low standby power 10T (LP10T) SRAM cell with high read stability
and write-ability (RSNM/WSNM/WM). The proposed LP10T SRAM cell uses a strong cross …

Two-dimensional fully ferroelectric-gated hybrid computing-in-memory hardware for high-precision and energy-efficient dynamic tracking

T Lu, J Xue, P Shen, H Liu, X Gao, X Li, J Hao… - Science …, 2024 - science.org
Computing in memory (CIM) breaks the conventional von Neumann bottleneck through in
situ processing. Monolithic integration of digital and analog CIM hardware, ensuring both …

Ultra-low-power and stable 10-nm FinFET 10T sub-threshold SRAM

E Abbasian, S Birla, M Gholipour - Microelectronics Journal, 2022 - Elsevier
This paper explores an ultra-low-power 10T subthreshold SRAM with high stabilities based
on 10-nm FinFETs. To prove the superiority of the proposed 10T SRAM's performance, a …

A single-bitline 9T SRAM for low-power near-threshold operation in FinFET technology

E Abbasian, M Gholipour, S Birla - Arabian Journal for Science and …, 2022 - Springer
Static random-access memories (SRAMs), which are the most ubiquitous in modern system-
on-chips, suffer from high power dissipation and poor stability in advanced complementary …

Design of a Schmitt-trigger-based 7T SRAM cell for variation resilient low-energy consumption and reliable internet of things applications

E Abbasian, M Gholipour - AEU-International Journal of Electronics and …, 2021 - Elsevier
The internet of things (IoTs)-based systems require battery-enabled energy-efficient memory
circuits to operate at low voltage domain, especially below the transistor's threshold. This …

Energy-efficient single-ended read/write 10t near-threshold sram

E Abbasian, S Sofimowloodi - IEEE Transactions on Circuits …, 2023 - ieeexplore.ieee.org
Modern system-on-chip-based applications require low-power/energy SRAMs for long-term
operation. To deal with this issue, near-threshold SRAM design is an effective approach. In …

A highly stable low-energy 10T SRAM for near-threshold operation

E Abbasian - IEEE Transactions on Circuits and Systems I …, 2022 - ieeexplore.ieee.org
This paper aims to explore the design of a novel highly stable low-energy 10T (SLE10T)
SRAM cell for near-threshold operation. The latch core of the proposed design consists of a …

A 32 nm single-ended single-port 7T static random access memory for low power utilization

B Rawat, P Mittal - Semiconductor Science and Technology, 2021 - iopscience.iop.org
In this paper, a seven-transistor static random access memory (SRAM) bit cell with a single
bitline architecture is proposed. This cell is designed at 32 nm and is operational at 300 mV …

A robust and write bit-line free sub-threshold 12T-SRAM for ultra low power applications in 14 nm FinFET technology

M Karamimanesh, E Abiri, K Hassanli, MR Salehi… - Microelectronics …, 2021 - Elsevier
In this paper, a robust 12T-SRAM memory cell at sub-threshold voltage is designed to
reduce power consumption for low power applications, that in addition to reducing power …

A schmitt-trigger-based low-voltage 11 T SRAM cell for low-leakage in 7-nm FinFET technology

E Abbasian, E Mani, M Gholipour… - Circuits, Systems, and …, 2022 - Springer
This paper proposes a modified Schmitt-trigger (ST)-based single-ended 11 T (MST11T)
SRAM cell. The proposed cell is best suited to ultra-low voltage applications. Two ST-based …