Progress and challenges in VLSI placement research

IL Markov, J Hu, MC Kim - … of the International Conference on Computer …, 2012 - dl.acm.org
Given the significance of placement in IC physical design, extensive research studies
performed over the last 50 years addressed numerous aspects of global and detailed …

Differentiable-timing-driven global placement

Z Guo, Y Lin - Proceedings of the 59th ACM/IEEE Design Automation …, 2022 - dl.acm.org
Placement is critical to the timing closure of the very-large-scale integrated (VLSI) circuit
design flow. This paper proposes a differentiable-timing-driven global placement framework …

DREAMPlace 4.0: Timing-driven global placement with momentum-based net weighting

P Liao, S Liu, Z Chen, W Lv, Y Lin… - 2022 Design, Automation …, 2022 - ieeexplore.ieee.org
Timing optimization is critical to integrated circuit (IC) design closure. Existing global
placement algorithms mostly focus on wirelength optimization without considering timing. In …

Towards optimal performance-area trade-off in adders by synthesis of parallel prefix structures

S Roy, M Choudhury, R Puri, DZ Pan - Proceedings of the 50th Annual …, 2013 - dl.acm.org
This paper proposes an efficient algorithm to synthesize prefix graph structures that yield
adders with the best performance-area trade-off. For designing a parallel prefix adder of a …

Dreamplace 4.0: Timing-driven placement with momentum-based net weighting and lagrangian-based refinement

P Liao, D Guo, Z Guo, S Liu, Y Lin… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Optimizing timing is critical to the design closure of integrated circuits (ICs). However, most
existing algorithms for circuit placement focus on the optimization of wirelength instead of …

Timing-driven placement

DZ Pan, B Halpin, H Ren - Handbook of Algorithms for Physical …, 2008 - taylorfrancis.com
This chapter reviews two basic sets of netweighting algorithms: static netweighting and
dynamic netweighting. It explores two global placement approaches: partitioning and force …

Large-scale circuit placement

J Cong, JR Shinnerl, M Xie, T Kong… - ACM Transactions on …, 2005 - dl.acm.org
Placement is one of the most important steps in the RTL-to-GDSII synthesis process, as it
directly defines the interconnects, which have become the bottleneck in circuit and system …

Techniques for fast physical synthesis

CJ Alpert, SK Karandikar, Z Li, GJ Nam… - Proceedings of the …, 2007 - ieeexplore.ieee.org
The traditional purpose of physical synthesis is to perform timing closure, ie, to create a
placed design that meets its timing specifications while also satisfying electrical, routability …

Diffusion-based placement migration

H Ren, DZ Pan, CJ Alpert, P Villarrubia - Proceedings of the 42nd annual …, 2005 - dl.acm.org
Placement migration is the movement of cells within an existing placement to address a
variety of post-placement design closure issues, such as timing, routing congestion, signal …

Detailed placement with search and repair

AC Mihal, S Teig - US Patent 8,984,464, 2015 - Google Patents
(57) ABSTRACT A method of detailed placement for ICs is provided. The method receives
an initial placement and iteratively builds sets of constraints for placement of different groups …