Approximate arithmetic circuits: A survey, characterization, and recent applications

H Jiang, FJH Santiago, H Mo, L Liu… - Proceedings of the …, 2020 - ieeexplore.ieee.org
Approximate computing has emerged as a new paradigm for high-performance and energy-
efficient design of circuits and systems. For the many approximate arithmetic circuits …

In‐Memory Vector‐Matrix Multiplication in Monolithic Complementary Metal–Oxide–Semiconductor‐Memristor Integrated Circuits: Design Choices, Challenges, and …

A Amirsoleimani, F Alibart, V Yon, J Xu… - Advanced Intelligent …, 2020 - Wiley Online Library
The low communication bandwidth between memory and processing units in conventional
von Neumann machines does not support the requirements of emerging applications that …

Bit fusion: Bit-level dynamically composable architecture for accelerating deep neural network

H Sharma, J Park, N Suda, L Lai… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
Hardware acceleration of Deep Neural Networks (DNNs) aims to tame their enormous
compute intensity. Fully realizing the potential of acceleration in this domain requires …

Domain-specific hardware accelerators

WJ Dally, Y Turakhia, S Han - Communications of the ACM, 2020 - dl.acm.org
Domain-specific hardware accelerators Page 1 48 COMMUNICATIONS OF THE ACM | JULY
2020 | VOL. 63 | NO. 7 contributed articles FROM THE SIMPLE embedded processor in your …

Shenango: Achieving high {CPU} efficiency for latency-sensitive datacenter workloads

A Ousterhout, J Fried, J Behrens, A Belay… - … USENIX Symposium on …, 2019 - usenix.org
Datacenter applications demand microsecond-scale tail latencies and high request rates
from operating systems, and most applications handle loads that have high variance over …

From high-level deep neural models to FPGAs

H Sharma, J Park, D Mahajan, E Amaro… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
Deep Neural Networks (DNNs) are compute-intensive learning models with growing
applicability in a wide range of domains. FPGAs are an attractive choice for DNNs since they …

Dadiannao: A machine-learning supercomputer

Y Chen, T Luo, S Liu, S Zhang, L He… - 2014 47th Annual …, 2014 - ieeexplore.ieee.org
Many companies are deploying services, either for consumers or industry, which are largely
based on machine-learning algorithms for sophisticated processing of large amounts of …

Stripes: Bit-serial deep neural network computing

P Judd, J Albericio, T Hetherington… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
Motivated by the variance in the numerical precision requirements of Deep Neural Networks
(DNNs)[1],[2], Stripes (STR), a hardware accelerator is presented whose execution time …

[HTML][HTML] A survey on hardware accelerators: Taxonomy, trends, challenges, and perspectives

B Peccerillo, M Mannino, A Mondelli… - Journal of Systems …, 2022 - Elsevier
In recent years, the limits of the multicore approach emerged in the so-called “dark silicon”
issue and diminishing returns of an ever-increasing core count. Hardware manufacturers …

[HTML][HTML] ASAP7: A 7-nm finFET predictive process design kit

LT Clark, V Vashishtha, L Shifren, A Gujja, S Sinha… - Microelectronics …, 2016 - Elsevier
We describe a 7-nm predictive process design kit (PDK) called the ASAP7 PDK, developed
in collaboration with ARM Ltd. for academic use. The PDK is realistic, based on current …