Efficient and high-performance parallel hardware architectures for the AES-GCM

M Mozaffari-Kermani… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Since its acceptance as the adopted symmetric-key algorithm, the Advanced Encryption
Standard (AES) and its recently standardized authentication Galois/Counter Mode (GCM) …

Reliable and high-performance hardware architectures for the Advanced Encryption Standard/Galois Counter Mode

M Mozaffari-Kermani - 2011 - search.proquest.com
The high level of security and the fast hardware and software implementations of the
Advanced Encryption Standard (AES) have made it the first choice for many critical …

High performance GCM architecture for the security of high speed network

V Mohanraj, R Sakthivel, A Paul, S Rho - International Journal of Parallel …, 2018 - Springer
Abstract Advanced Encryption Standard (AES) is an effective cryptography algorithm for
providing the better data communication since it guaranties high security. The …

[PDF][PDF] High-Performance VLSI Architecture for AES-GCM Algorithm with Sub Pipelining

B LOHITHA, KP VASAVI - 2014 - ijvdcs.org
The need for high speed data transmission along with efficient security to the data ia
progressing day by day. This motivated the research in the development of high …

[图书][B] A Multiple Bit Parity Fault Detection Scheme for The Advanced Encryption Standard Galois/Counter Mode

AHAK Geran - 2014 - search.proquest.com
Abstract The Advanced Encryption Standard (AES) is a symmetric-key block cipher for
electronic data announced by the US National Institute of Standards and Technology (NIST) …

A Multiple Bit Parity Fault Detection Scheme for The Advanced Encryption Standard Galois/Counter Mode

AH Ali Kouzeh Geran - 2014 - ir.lib.uwo.ca
Abstract The Advanced Encryption Standard (AES) is a symmetric-key block cipher for
electronic data announced by the US National Institute of Standards and Technology (NIST) …