The layout area and power consumption of a charge-scaling digital-to-analog converter
(DAC) is typically dominated by the capacitor array. For a binary-weighted DAC, since the …

Performance modeling is a key bottleneck for analog design automation. Although machine
learning-based models have advanced the state-of-the-art, they have so far suffered from …

In analog circuits, process variation can cause unpredictability in circuit performance.
Common-centroid (CC) type layouts have been shown to mitigate process-induced …

In this work, an SAR ADC that integrates the 2b/Cycle quantization technique and time-
interleaved structure is designed. Additionally, a fully digital background calibration has …

Building upon recent advances in analog electronic design automation (EDA), this paper
discusses directions for reinforcing the connection between design and EDA, in order to …

A fully integrated 6-15.3 GHz active digital step attenuator (DSA) with 5-bit digital gain
control for phased-array radar system in SMIC 40-nm CMOS technology is presented in this …

The ALIGN (Analog Layout, Intelligently Generated from Netlists) project [1, 2] is a joint
university-industry effort to push the envelope of automated analog layout through a …

Arrays of active and passive devices are widely employed to translate large transistor sizes
from a circuit schematic to their layout implementation. For example, capacitive digital-to …

This paper presents a systematic approach to generate layouts for two devices, with an
arbitrary integer ratio of device sizes, that cancels up to at least 3 rd order gradient effects. A …

Abstract Analog Integrated Circuit (IC) design is usually a manual design process which
requires human experts engagement and thus is labor-intensive. In addition, the design …