Memory reliability is a key factor in the design of warehouse-scale computers. Prior work has
focused on the performance overheads of memory fault-tolerance schemes when errors do …

Effective use of the memory hierarchy is crucial to cloud computing. Platform memory
subsystems must be carefully provisioned and configured to minimize overall cost and …

IoT devices need reliable hardware at low cost. It is challenging to efficiently cope with both
hard and soft faults in embedded scratchpad memories. To address this problem, we …

Conventional error-correcting codes (ECCs) and system-level fault-tolerance mechanisms
are currently treated as separate abstraction layers. This can reduce the overall efficacy of …

The threat to data privacy has never been more alarming than it is today. Among existing
privacy-enhancing technologies, differential privacy (DP) is widely accepted as the de facto …

Approximate memories expose data elements to errors in order to improve energy efficiency.
For a large fraction of data, these errors are inconsequential or lead only to small losses in …

The software-based implementation of differential privacy mechanisms has been shown to
be neither friendly for lightweight devices nor secure against side-channel attacks. In this …

With the rapid development of information technology, bar code technology is widely used in
information collection, logistics and warehousing, power management, and automatic …

The reliability of memory subsystems is worsening rapidly and needs to be considered as
one of the primary design objectives when designing today's computer systems. From on …

Voltage scaling to values near the threshold voltage is a promising technique to hold off the
many-core power wall. However, as voltage decreases, some SRAM cells are unable to …