Efficient FPGA implementation of an RFIR filter using the APC–OMS technique with WTM for high-throughput signal processing

KS Reddy, S Madhavan, P Falkowski-Gilski… - Electronics, 2022 - mdpi.com
Nowadays, Finite Impulse Response (FIR) filters are used to change the attributes of a
signal in the time or frequency domain. Among FIR filters, a reconfigurable filter has the …

FPGA implementation of high performance digital FIR filter design using a hybrid adder and multiplier

V Thamizharasan, N Kasthuri - International Journal of Electronics, 2023 - Taylor & Francis
The energetic growth in portable multimedia and mobile communication system has
increased the requirement of high-speed signal processing system with compact area and …

FPGA architecture to perform symmetric extension on signals for handling border discontinuities in FIR filtering

KP Kumar, A Kanhe - Computers and Electrical Engineering, 2022 - Elsevier
This paper proposes a generalized hardware architecture for performing the half-sample
and whole-sample symmetric/anti-symmetric extension of a finite-length signal to handle the …

Enhanced Shifting Method for an Area-Efficient Design of FIR Filter Based on FPGA

HF Yahya, IA Hashim - 2022 5th International Conference on …, 2022 - ieeexplore.ieee.org
The Finite Impulse Response (FIR) filter is an important part of a Digital Signal Processing
(DSP) system. The Multiply and Accumulate (MAC) technique is used to compute the FIR …

Real-time FPGA implementation of FIR filter using OpenCL design

I Firmansyah, Y Yamaguchi - Journal of Signal Processing Systems, 2022 - Springer
This paper proposes the implementation of a real-time finite impulse response (FIR) filter
with a field-programmable gate array (FPGA) and Open Computing Language (OpenCL) …

Hardware Acceleration of FIR Filter Implementation on ZYNQ SoC

G Tatar, S Bayar, İ Çiçek - 2022 IEEE 16th International …, 2022 - ieeexplore.ieee.org
Finite impulse response (FIR) filters are widely used in electronic design applications such
as digital signal processing, image processing and digital communications. The demand for …

Fault Tolerant FPGA Implementation on Redundancy Techniques and ECG Denoising

S SM - arXiv preprint arXiv:2304.08165, 2023 - arxiv.org
As more the communications and signal process we use in the today life the more we intend
to develop more reliable devices which gives fewer errors due to transient fault, So we use a …

Low Area Implementation of FIR Filter Based on FPGA Using Approximation Method

HF Yahya, IA Hashim - 2023 3rd International Scientific …, 2023 - ieeexplore.ieee.org
A new approach is proposed that synthesizes multiplier blocks with minimal hardware
requirements than standard block FIR filters, making them appropriate for applications of FIR …

Rethinking FPGA Architectures for Deep Neural Network applications

S Rasoulinezhad - 2023 - ses.library.usyd.edu.au
The prominence of machine learning-powered solutions instituted an unprecedented trend
of integration into virtually all applications with a broad range of deployment constraints from …

A FPGA implementation of Resonance Demodulation and its Spectrum Analysis

Q Du, Z Ma - 2023 2nd International Conference on Computing …, 2023 - ieeexplore.ieee.org
Nowadays, the real-time performance of fault diagnosis is not high enough, hardware
methods can be adopted, including using DSP processor or field programmable gate array …