Accelerating CNN inference on ASICs: A survey

D Moolchandani, A Kumar, SR Sarangi - Journal of Systems Architecture, 2021 - Elsevier
Convolutional neural networks (CNNs) have proven to be a disruptive technology in most
vision, speech and image processing tasks. Given their ubiquitous acceptance, the research …

Bit fusion: Bit-level dynamically composable architecture for accelerating deep neural network

H Sharma, J Park, N Suda, L Lai… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
Hardware acceleration of Deep Neural Networks (DNNs) aims to tame their enormous
compute intensity. Fully realizing the potential of acceleration in this domain requires …

Maeri: Enabling flexible dataflow mapping over dnn accelerators via reconfigurable interconnects

H Kwon, A Samajdar, T Krishna - ACM SIGPLAN Notices, 2018 - dl.acm.org
Deep neural networks (DNN) have demonstrated highly promising results across computer
vision and speech recognition, and are becoming foundational for ubiquitous AI. The …

From high-level deep neural models to FPGAs

H Sharma, J Park, D Mahajan, E Amaro… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
Deep Neural Networks (DNNs) are compute-intensive learning models with growing
applicability in a wide range of domains. FPGAs are an attractive choice for DNNs since they …

Understanding reuse, performance, and hardware cost of dnn dataflow: A data-centric approach

H Kwon, P Chatarasi, M Pellauer, A Parashar… - Proceedings of the …, 2019 - dl.acm.org
The data partitioning and scheduling strategies used by DNN accelerators to leverage reuse
and perform staging are known as dataflow, which directly impacts the performance and …

Maximizing CNN accelerator efficiency through resource partitioning

Y Shen, M Ferdman, P Milder - ACM SIGARCH Computer Architecture …, 2017 - dl.acm.org
Convolutional neural networks (CNNs) are revolutionizing machine learning, but they
present significant computational challenges. Recently, many FPGA-based accelerators …

Deep convolutional neural network architecture with reconfigurable computation patterns

F Tu, S Yin, P Ouyang, S Tang, L Liu… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Deep convolutional neural networks (DCNNs) have been successfully used in many
computer vision tasks. Previous works on DCNN acceleration usually use a fixed …

Evaluating fast algorithms for convolutional neural networks on FPGAs

L Lu, Y Liang, Q Xiao, S Yan - 2017 IEEE 25th annual …, 2017 - ieeexplore.ieee.org
In recent years, Convolutional Neural Networks (CNNs) have become widely adopted for
computer vision tasks. FPGAs have been adequately explored as a promising hardware …

A bi-layered parallel training architecture for large-scale convolutional neural networks

J Chen, K Li, K Bilal, K Li, SY Philip - IEEE transactions on …, 2018 - ieeexplore.ieee.org
Benefitting from large-scale training datasets and the complex training network,
Convolutional Neural Networks (CNNs) are widely applied in various fields with high …

A high energy efficient reconfigurable hybrid neural network processor for deep learning applications

S Yin, P Ouyang, S Tang, F Tu, X Li… - IEEE Journal of Solid …, 2017 - ieeexplore.ieee.org
Hybrid neural networks (hybrid-NNs) have been widely used and brought new challenges to
NN processors. Thinker is an energy efficient reconfigurable hybrid-NN processor fabricated …