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Self-aligned 3-D epitaxial structures for MOS device fabrication
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Semiconductor devices including silicide regions and methods of fabricating the same
(57) ABSTRACT A semiconductor device includes a semiconductor Substrate, a gate
electrode structure including a gate electrode located on an active region of the …
electrode structure including a gate electrode located on an active region of the …
Low power semiconductor transistor structure and method of fabrication thereof
L Shifren, P Ranade, SE Thompson… - US Patent …, 2013 - Google Patents
Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced
OV, compared to conven tional bulk CMOS and can allow the threshold voltage V of FETs …
OV, compared to conven tional bulk CMOS and can allow the threshold voltage V of FETs …
Advanced transistors with punch through suppression
L Shifren, P Ranade, PE Gregory… - US Patent …, 2013 - Google Patents
An advanced transistor with punch through suppression includes a gate with length Lg, a
well doped to have a? rst concentration of a dopant, and a screening region positioned …
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Bit interleaved low voltage static random access memory (SRAM) and related methods
LT Clark - US Patent 9,070,477, 2015 - Google Patents
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Dynamic random access memory (DRAM) with low variation transistor peripheral circuits
(65) Prior Publication Data(Continued) US 2014/O119099 A1 May 1, 2014 Primary
Examiner—Andrew Q Tran (74) Attorney, Agent, or Firm—Baker Botts LLP Related US …
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Process for manufacturing an improved analog transistor
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Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of …
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include forming HOIL 21/82(2006.015 conventional channel field effect transistors (FETs) …
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Semiconductor device and manufacturing method
M Fukuda, Y Shimamune - US Patent App. 12/026,917, 2008 - Google Patents
BACKGROUND 0003 Improvement in fine structures has been continuing for improving
integration density and also improving pro cessing speed of a silicon semiconductor …
integration density and also improving pro cessing speed of a silicon semiconductor …