An effective way to reduce supply voltage and resulting power consumption without losing
the circuit performance of CMOS is to use CMOS structures using high carrier …

Strain greatly affects the electrical properties of silicon because strain changes the energy
band structure of silicon. In MOSFET devices, the terminal voltages induce electrical fields …

A combination of the materials science, manufacturing processes, and pioneering research
and developments of SiGe and strained-Si have offered an unprecedented high level of …

The electron effective mobility in ultrathin-body n-channel metal-oxide-semiconductor field-
effect transistors fabricated on Ge-free 30% strained-Si directly on insulator (SSDOI) is …

This paper describes the performance of nMOS and pMOS tall triple gate (MUGFET) devices
with fin widths down to 20 nm fabricated for the first time on super critical strained Si on …

In the first part of this two-part article, implant-induced strain relaxation has been
successfully demonstrated on a common strained silicon-on-insulator (SSOI) platform. In this …

This work shows a comparison between the analog performance of standard and strained Si
n-type triple-gate FinFETs with high-κ dielectrics and TiN gate material. Different channel …

Fully depleted silicon-on-insulator (FDSOI) n and pMOSFETs (Metal–Oxide–Semiconductor-
Field-Effect-Transistors) are integrated with a TiN/HfO2 gate stack on 1.55 GPa strained SOI …

We have extensively studied stress enhancing techniques to increase channel mobility
starting at the 130 nm technology node and continued this towards the 45 nm node …

We investigated the crystalline quality of supercritical-thickness strained silicon-on-insulator
(SC-sSOI) wafers by synchrotron X-ray topography and its correlation with electrical …