Design Techniques for Energy Efficient Analog-to-Digital Converters

MH Jang, X Tang, Y Lim, JG Kauffman… - IEEE Open Journal …, 2023 - ieeexplore.ieee.org
The energy efficiency of analog-to-digital converters (ADCs) has improved steadily over the
past 40 years, with the best reported ADC efficiency improving by nearly six orders of …

A 65-dB-SNDR pipelined SAR ADC Using PVT-robust capacitively degenerated dynamic amplifier

H Yoon, C Lee, T Kim, Y Kwon… - IEEE Journal of Solid …, 2023 - ieeexplore.ieee.org
This article presents a process, voltage, and temperature (PVT)-robust capacitively
degenerated dynamic amplifier as the residue amplifier of the low-power pipelined …

Design of a Linearized Power-Efficient Dynamic Amplifier in 22nm FDSOI

BB Yang, ATC Carusone - 2024 IEEE International Symposium …, 2024 - ieeexplore.ieee.org
Dynamic amplifiers are emerging as a popular alternative to conventional operational
amplifiers due to their high power-efficiency, albeit at the cost of linearity performance. We …

An Energy-Efficient Pipeline-SAR ADC using Linearized Dynamic Amplifiers and Input Buffer in 22nm FDSOI

B Yang, T Caldwell… - IEEE Open Journal of …, 2024 - ieeexplore.ieee.org
Recently, dynamic amplifier (DA) has emerged as a popular alternative to static current
closed-loop operational transconductance amplifier (OTA) due to their highly power-efficient …

A 20 MHz, 98.7 dB-SFDR, Capacitively Degenerated Dynamic Amplifier Without Bias Voltage Calibrations

R Zhang, H Zhuang, Y Cao, Q Li - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Capacitively-degenerated-linearization (CDL) dynamic amplifier has superior linearity,
which is appropriate to act as a residue amplifier in pipelined successive-approximation …