Revolutionizing CMOS VLSI with Innovative Memory Design Techniques

F Hernández, L Sánchez… - Fusion of …, 2022 - fusionproceedings.com
The revolution in CMOS VLSI (Complementary Metal-Oxide-Semiconductor Very-Large-
Scale Integration) technology is being driven by innovative memory design techniques that …

Design and development of an ASIC standard cell library using 90nm technology node

LM Naga, P Mullangi - 2018 international conference on …, 2018 - ieeexplore.ieee.org
Standard cell libraries are an important part of many of today's integrated circuit (IC) designs.
The design of all digital ASICs (Application Specific Integrated Circuit) essentially involves …

Clock mesh synthesis through dynamic programming with physical parameters consideration

D Li, J Gan, C Shen, Q Chen, L Yang, S Qiu, X Jin… - Integration, 2025 - Elsevier
In response to the evolving technological landscape, the traditional clock network
architecture faces challenges in meeting the complexities of modern System-on-Chip (SoC) …

Static verification tool improvement in ASIC design flow: Tool Evaluation using a real design

V Kautto - 2022 - trepo.tuni.fi
Verification is now the most time-consuming step in the design flow for digital circuits.
Design organizations are constantly researching improvements to accelerate verification …

The path to bilingualism, a road to better cognitive performance? Metaphors of language learning in Cognitive Science

S Jansen - Cognition and Second Language Acquisition: Studies …, 2022 - books.google.com
This paper proposes to anlyse research on the relationship between lan‐-guage and
cognition as a social practice of knowledge construction, which largely relies on metaphor …

Clock Mesh Synthesis Methodology Based on Combinatorial Optimization

D Li, X Feng, C Shen, Q Chen, L Yang, S Qiu, X Jin… - 2023 - preprints.org
In light of advancing technology, the conventional clock network architecture has become
inadequate for addressing the intricacies inherent in modern System-on-Chip (SoC) …

A Modular Flow for Rapid FPGA Design Implementation

AR Love - 2015 - search.proquest.com
This dissertation proposes an alternative FPGA design compilation ow to reduce the back-
end time required to implement an FPGA design to below the level at which the user's at …

[PDF][PDF] Nurturing the Cyber-Physical Pedagogical Approach for Outcome based Learning in Embedded Systems

R Kamat, TD Dongale, GH Leela… - Proceedings of the …, 2013 - researchgate.net
Embedded system is a rapidly emerging branch of Electronics engineering that derives the
concepts and ideas from host of other branches of knowledge such as Electrical …

[PDF][PDF] Medikal görüntüleme cihazlarında kullanılan TDC mimarisinin VLSI gerçeklenmesi

MA Özdemir - 2019 - dspace.kocaeli.edu.tr
11C: Karbon radyoizotopu 13N: Azot radyoizotopu 15O: Oksijen radyoizotopu 18F: Florin
radyoizotopu β+: Pozitron parçacığı Cc: Yüklü kapasitans,(mF) Dk: TDC sayısal çıkışı f: Saat …

[PDF][PDF] SPEED e-NEWSLETTER

MW Moore's Law - 2015 - researchgate.net
While Electronics is touching almost all the facets of the societal life, we are witnessing ever
increasing smart spaces and ambient intelligence being inculcated around us. To a larger …