A semiconductor structure and method of manufacturing is provided. The method of manufacturing includes forming shallow trench isolation (STI) in a substrate and providing a …
BB Doris, KW Guarini, M Ieong, S Narasimha… - US Patent …, 2008 - Google Patents
An integrated semiconductor structure containing at least one device formed upon a first crystallographic surface that is optimal for that device, while another device is formed upon a …
(57) ABSTRACT A semiconductor device and method of manufacturing a semiconductor device. The semiconductor device includes channels for a pFET and annFET. A SiGe layer …
A semiconductor device structure, includes a PMOS device 200 and an NMOS device 300 disposed on a substrate 1, 2, the PMOS device including a compressive layer 6 stressing an …
H Zhu, SW Bedell, BB Doris, Y Zhang - US Patent 7,247,912, 2007 - Google Patents
(Continued) the stress in the strained Si film, the relaxed SiGe block may be removed to allow a second gate oxide to be formed on the surface previously occupied by the relaxed …
H Zhu, BB Doris - US Patent 7,224,033, 2007 - Google Patents
A part of the gate of a FINFET is replaced with a stress material to apply stress to the channel of the FINFET to enhance electron and hole mobility and improve performance. The FINFET …
(57) ABSTRACT A semiconductor structure and method of manufacturing is provided. The method of manufacturing includes forming shallow trench isolation (STI) in a substrate and …
BB Doris, D Chidambarrao, SH Ku - US Patent 7,279,746, 2007 - Google Patents
A semiconductor device structure includes at least two field effect transistors formed on same substrate, the first field effect transistor includes a spacer having a first width, the …