A low latency energy efficient BFT based 3D NoC design with zone based routing strategy

A Bose, P Ghosal - Journal of Systems Architecture, 2020 - Elsevier
NoC, along with 3D IC technology, successfully addresses communication needs in
complex many-core systems today. Major challenges are scalability, network efficiency …

RetsoftPlus: a tool for retinal image analysis

M Lalonde, F Laliberté, L Gagnon - Proceedings. 17th IEEE …, 2004 - ieeexplore.ieee.org
This paper describes a research software application specifically developed to assist
ophthalmologists in performing retinal image analysis. The application provides powerful …

Latency, throughput and power aware adaptive noc routing on orthogonal convex faulty region

MM Rahaman, P Ghosal, TS Das - Journal of Circuits, Systems and …, 2019 - World Scientific
Reliability of a Network-on-Chip (NoC) relies vastly upon the efficiency of handling faults.
Faults those lead to trouble during on-chip communication process are basically of two types …

Click-based asynchronous mesh network with bounded bundled data

A He, G Feng, J Zhang, P Li, Y Hei… - Proceedings of the 47th …, 2018 - dl.acm.org
We have implemented an asynchronous mesh network. This paper describes our innovative
design using a Click controller. Compared to designs that use other asynchronous circuit …

STA: A highly scalable low latency butterfly fat tree based 3D NoC design

A Bose, P Ghosal, SP Mohanty - 2016 IEEE Computer Society …, 2016 - ieeexplore.ieee.org
Since the past decade Network-on-Chip has evolved as the most dominant and efficient
solution in on-chip communication paradigm for multi-core systems. With the growing …

A provably good performance centric noc topology

TS Das, P Ghosal - 2013 IEEE Asia Pacific Conference on …, 2013 - ieeexplore.ieee.org
As chip density increases rapidly with every process generation, the use of Network-on-Chip
(NoC) has become the prevalent architecture for SoC, MPSoC, and, large scale CMP (Chip …

A performance enhancing hybrid locally mesh globally star NoC topology

TS Das, P Ghosal, SP Mohanty… - … of the 24th edition of the …, 2014 - dl.acm.org
With the rapid increase in the chip density, Network-on-Chip (NoC) is becoming the
prevalent architecture for today's complex chip multi processor (CMP) based systems. One …

[PDF][PDF] Directory-based Wired-wireless Network-on-chip Architectures to Improve Performance

KK Chidella - 2018 - soar.wichita.edu
ABSTRACT Network-on-Chip (NoC) architectures have emerged as a promising technology
for modern computer systems to address the design challenges of high-performance …

A New Memory-Based Routing Policy for Mesh Network

M Ding, D Liang, A He, J Xiong… - 2019 IEEE 4th …, 2019 - ieeexplore.ieee.org
We propose a new routing policy in Network on Chip (NoC) which is based on Memory.
Compared with the data-based routing policy, the Memory-based routing policy can carry …

Design of an interconnect topology for multi-cores and scale-out workloads

T Vidya, N Ramasubramanian - 2015 3rd International …, 2015 - ieeexplore.ieee.org
Scale-out workloads are applications that are typically executed in a cloud environment and
exhibit high level of request level parallelism. Such workloads benefit from processor …