Y Wang, K Li, K Li - IEEE Access, 2018 - ieeexplore.ieee.org
Low-power and short-latency memory access is critical to the performance of chip multiprocessor (CMP) system devices, especially to bridge the performance gap between …
DA Alonso, S Mamagkakis, C Poucet, M Peón-Quirós… - 2015 - Springer
Modern embedded systems in mobile and multimedia applications offer a wide range of features. They can also communicate to different devices using different standards which …
Memory management on many-core architectures is a major challenge for improving the overall system performance. Memory resources are distributed over nodes for faster local …
Thread-level and data-level parallel architectures have become the design of choice in many of today's energy-efficient computing systems. However, these architectures put …
J Chen, K Li, Z Tang, C Liu, Y Wang… - … Practice and Experience, 2016 - Wiley Online Library
In this paper, we propose a method about task scheduling and data assignment on heterogeneous hybrid memory multiprocessor systems for real‐time applications. In a …
Memory latency and energy efficiency are two key constraints to high performance computing systems. Data reuse transformations aim at reducing memory latency by …
A Milutinovic, A Molnos, K Goossens… - 20th Annual Workshop …, 2009 - research.utwente.nl
Power is an important design constraint for all nomadic and tethered devices as mobile phones or media-boxes today. This is mainly because it limits their operational time or …
De nombreuses techniques ont été développées pour réduire la consommation processeur considéré jusqu'à présent comme l'élément le plus gourmand en consommation. Avec …
Software applications use dynamic memory (allocated and deallocated in the system's heap) to handle dynamism in their working conditions. Embedded systems tend to include …