The field of natural language processing (NLP) has witnessed significant progress in recent
years, with a notable focus on improving large language models'(LLM) performance through …

Transformers have revolutionized deep learning and generative modeling, enabling
unprecedented advancements in natural language processing tasks. However, the size of …

Enhancing performance while reducing costs is the fundamental design philosophy of
integrated circuits (ICs). With advancements in packaging technology, interposer-based …

Innovative processor architecture designs are shifting towards Many-Core Architectures
(MCAs) to meet the future demands of high-performance computing as the limits of Moore's …

Deadlock-free routing is a significant challenge in Network-on-Chip (NoC) design as it
affects the network's latency, power consumption, and load balance, impacting the …

Contemporary accelerator designs exhibit a high degree of spatial localization, wherein two-
dimensional physical distance determines communication costs between processing …

Existing high-performance computing (HPC) interconnection architectures are based on
high-radix switches, which limits the injection/local performance and introduces …

Chiplet architectures are a promising paradigm to overcome the scaling challenges of
monolithic chips. Chiplets offer heterogeneity, modularity, and cost-effectiveness. The …

The field of natural language processing (NLP) has witnessed significant progress in recent
years, with a notable focus on improving large language models'(LLM) performance through …

Networks-on-chip (NoCs) are scaled out to build large-scale multi-chip networks to meet the
growing demand for computing. However, the traditional router-based NoC architecture has …