With the rapid developments in very large-scale integration (VLSI) technology, design and
computer-aided design (CAD) techniques, at both the chip and package level, the operating …

In recent years, reduced-order modelling techniques based on Krylov-subspace iterations,
especially the Lanczos algorithm and the Arnoldi process, have become popular tools for …

In today's technological world, physical and artificial processes are mainly described by
mathematical models, which can be used for simulation or control. These processes are …

This paper describes PRIMA, an algorithm for generating provably passive reduced order N-
port models for RCL interconnect circuits. It is demonstrated that, in addition to requiring …

The simulation of electronic circuits involves the numerical solution of very large-scale,
sparse, in general nonlinear, systems of differential-algebraic equations. Often, the size of …

Global interconnect is commonly regarded as a key potential bottleneck to the advancing
performance of high-speed integrated circuits. Our previous work has suggested that local …

Work in the area of model-order reduction for RLC interconnect networks has focused on
building reduced-order models that preserve the circuit-theoretic properties of the network …

In recent years, reduced-order modeling techniques based on Krylov-subspace iterations,
especially the Lanczos algorithm and the Arnoldi process, have become popular tools to …

This work addresses two fundamental concepts regarding deep-submicrometer
interconnect. First, characterization of on-chip interconnect is considered with particular …

The problem of model reduction with preservation of passivity is investigated. The approach
is based on positive real interpolation, and is inspired by the similarity between Löwner and …