A 12-bit 1.6, 3.2, and 6.4 GS/s 4-b/cycle time-interleaved SAR ADC with dual reference shifting and interpolation
JW Nam, M Hassanpourghadi, A Zhang… - IEEE Journal of Solid …, 2018 - ieeexplore.ieee.org
This paper demonstrates a multi-bit/cycle successive-approximation register (SAR) analog-
to-digital converter (ADC) architecture for low-power and high-speed operation. The …
to-digital converter (ADC) architecture for low-power and high-speed operation. The …
A 90-dB-SNDR calibration-free fully passive noise-shaping SAR ADC with 4× passive gain and second-order DAC mismatch error shaping
Noise-shaping (NS) successive approximation register (SAR) analog-to-digital converters
(ADCs) using passive loop filters have drawn the increasing attentions owing to their …
(ADCs) using passive loop filters have drawn the increasing attentions owing to their …
A reconfigurable 10-to-12-b 80-to-20-MS/s bandwidth scalable SAR ADC
An asynchronous successive approximation register analog-to-digital converter (ADC) for
wideband multi-standard systems is presented. The ADC can be configured as an 80-MS/s …
wideband multi-standard systems is presented. The ADC can be configured as an 80-MS/s …
An 11-bit 250-nW 10-kS/s SAR ADC with doubled input range for biomedical applications
M Sadollahi, K Hamashita, K Sobue… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
This paper presents a low-power, area-efficient 11-b single-ended successive-
approximation-register (SAR) analog-todigital converter (ADC) targeted for biomedical …
approximation-register (SAR) analog-todigital converter (ADC) targeted for biomedical …
A Self-Powered 3.26--m Wireless Temperature Sensor Node for Power Grid Monitoring
This paper presents a self-powered wireless temperature sensor node for power grid
monitoring. With an electromagnetic energy harvester, the node can operate without a …
monitoring. With an electromagnetic energy harvester, the node can operate without a …
Passive noise shaping in SAR ADC with improved efficiency
This brief reports a passive noise-shaping (PNS) scheme for successive approximation
register (SAR) analog-to-digital converter (ADC) based on the two-step integration with …
register (SAR) analog-to-digital converter (ADC) based on the two-step integration with …
An 8 bit-ENOB Sampling-rate Reconfigurable Asynchronous SAR ADC with Metastability Watchdog Circuit for Activity-driven Multi-Channel CMOS Readout ASICs for …
R Karim, M Grassi, P Malcovati - AEU-International Journal of Electronics …, 2024 - Elsevier
This article presents an innovative architecture and design of an 8-bits Effective-Number-of-
Bits (ENOB) Asynchronous Successive-Approximation-Register (ASAR) Analog-to-Digital …
Bits (ENOB) Asynchronous Successive-Approximation-Register (ASAR) Analog-to-Digital …
Low-power single-ended SAR ADC using symmetrical DAC switching for image sensors with passive CDS and PGA technique
An integrated, power-saving SAR analog-to-digital converter suitable for image sensor
applications is presented in this paper. In comparison with previous works, the proposed …
applications is presented in this paper. In comparison with previous works, the proposed …
Design of a 16-bit 500-MS/s SAR-ADC for low-power application
T Singh, SL Tripathi - Electronic Devices, Circuits, and Systems for …, 2021 - Elsevier
Nowadays, digital system technology is growing continuously, so the need of converting real-
time (analog) data to digital data plays an important role. Whereas with the advancement in …
time (analog) data to digital data plays an important role. Whereas with the advancement in …
A 12.8-Gbaud ADC-based wireline receiver with embedded IIR equalizer
JW Nam, MSW Chen - IEEE Journal of Solid-State Circuits, 2019 - ieeexplore.ieee.org
This article demonstrates an analog-to-digital converter (ADC)-based receiver for
NRZ/PAM4 modulation, featuring a time-to-digital converter (TDC)-assisted multi-bit/cycle …
NRZ/PAM4 modulation, featuring a time-to-digital converter (TDC)-assisted multi-bit/cycle …