C1. Flexible LDPC decoder architecture for (3–6) regular codes
AM Sadek, AI Hussein - 2015 32nd National Radio Science …, 2015 - ieeexplore.ieee.org
Low density parity check (LDPC) codes are a class of block codes with a very high error
correcting performance. That performance made them suitable for many modern …
correcting performance. That performance made them suitable for many modern …
New algorithms for high-throughput decoding with low-density parity-check codes using fixed-point simd processors
JWA Kennedy - 2012 - search.proquest.com
Most digital signal processors contain one or more functional units with a single-instruction,
multiple-data architecture that supports saturating fixed-point arithmetic with two or more …
multiple-data architecture that supports saturating fixed-point arithmetic with two or more …