This paper reviews the current state of research in carbon-based nanomaterials, particularly
the one-dimensional (1-D) forms, carbon nanotubes (CNTs) and graphene nanoribbons …

Carbon nanotubes and graphene nanoribbons are two promising next-generation
interconnect technologies. Electrical modeling and performance analysis have …

This paper introduces the first comprehensive and accurate compact resistance-inductance-
capacitance-conductance (RLCG) model for through-silicon vias (TSVs) in 3-D ICs valid …

Level one electronics packaging is traditionally defined as the design and production of the
encapsulating structure that provides mechanical support, environmental protection …

In this paper, we present analytical models for fast estimation of coupling capacitance of
square-shaped through-silicon vias (TSVs) in three-dimensional integrated circuits (3D ICs) …

In this work, we present a robust small delay test scheme for through-silicon vias (TSVs) in a
3D IC. By changing the output inverter's threshold of a TSV in a testable oscillation ring …

Recent advances in semiconductor technology offer vertical interconnect access (via) that
extend through silicon, popularly known as through silicon via (TSV). This book provides a …

A semianalytical model of the through-silicon via (TSV) capacitance for elevated operating
temperatures is derived and verified with electrical measurements. The effect of temperature …

A parametric delay fault could arise in a through-silicon via (TSV) of a 3-D IC due to a
manufacturing defect. Identification of such a fault is essential for fault diagnosis, yield …

In this paper, we propose a method and the required architecture for characterizing the
propagation delays of the through Silicon vias (TSVs) in a 3-D IC. First of all, every two TSVs …