A Heuristic boolean NPN equivalent matching verification method based on shannon decomposition
J Zhang, W Guo, G Yang, Y Zhu, X Lv - IEEE Access, 2022 - ieeexplore.ieee.org
In this paper, we describe a new verification method to accelerate the input negation and/or
input permutation and/or output negation (NPN) Boolean matching for a single-output …
input permutation and/or output negation (NPN) Boolean matching for a single-output …
An efficient NPN Boolean matching algorithm based on structural signature and Shannon expansion
An efficient pairwise Boolean matching algorithm for solving the problem of matching single-
output specified Boolean functions under input negation and/or input permutation and/or …
output specified Boolean functions under input negation and/or input permutation and/or …
Fast filter-based boolean matchers
<? Pub Dtl=""?> Boolean matching is one of the fundamental and time-consuming
procedures in field-programmable gate array (FPGA) synthesis. The SAT-based Boolean …
procedures in field-programmable gate array (FPGA) synthesis. The SAT-based Boolean …